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authorMark Yao <mark.yao@rock-chips.com>2015-01-22 11:15:02 +0800
committerMark Yao <mark.yao@rock-chips.com>2015-03-16 13:48:15 +0800
commit44ddb7ef38ae720849cf81e71c370e55071b05a7 (patch)
treeb7b9d675a44eacfe8487deec7ead06e6e856f958 /drivers/gpu
parentf76c83b580043d55b2899719da61fe000839812d (diff)
downloadop-kernel-dev-44ddb7ef38ae720849cf81e71c370e55071b05a7.zip
op-kernel-dev-44ddb7ef38ae720849cf81e71c370e55071b05a7.tar.gz
drm/rockchip: vop: fix vop vsync/hsync polarity
Vop set wrong vsync/hsync polarity, it may cause some display problem. known problem is that caused HDMI hdcp authenticate failed, caused pixel offset with hdmi display. the polarity description at RK3288 TRM doc: dsp_vsync_pol VSYNC polarity 1'b0 : negative 1'b1 : positive dsp_hsync_pol HSYNC polarity 1'b0 : negative 1'b1 : positive Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/rockchip/rockchip_drm_vop.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 9a5c571..2b145ba5 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -874,8 +874,8 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc,
VOP_CTRL_SET(vop, out_mode, vop->connector_out_mode);
val = 0x8;
- val |= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0;
- val |= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? (1 << 1) : 0;
+ val |= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1;
+ val |= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1);
VOP_CTRL_SET(vop, pin_pol, val);
VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
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