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author | Christian König <christian.koenig@amd.com> | 2014-05-13 12:50:54 +0200 |
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committer | Christian König <christian.koenig@amd.com> | 2014-05-20 14:42:05 +0200 |
commit | 74ad54f249de39bc040cce7237b1b854a9c6f0ad (patch) | |
tree | 2a388c03c1df128ada414e47fb7bfec6bd9b0de2 /drivers/gpu | |
parent | 4955bb073f1be6dd884b5d10041ba4bade6495bf (diff) | |
download | op-kernel-dev-74ad54f249de39bc040cce7237b1b854a9c6f0ad.zip op-kernel-dev-74ad54f249de39bc040cce7237b1b854a9c6f0ad.tar.gz |
drm/radeon: fix typo in finding PLL params
Otherwise the limit is raised to high.
Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: Ken Moffat <zarniwhoop@ntlworld.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 408b6ac..f00dbbf 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -999,7 +999,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, /* avoid high jitter with small fractional dividers */ if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && (fb_div % 10)) { - fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 60); + fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 50); if (fb_div < fb_div_min) { unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div); fb_div *= tmp; |