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authorDeepak S <deepak.s@linux.intel.com>2015-03-28 15:23:34 +0530
committerJani Nikula <jani.nikula@intel.com>2015-04-07 15:36:40 +0300
commitc9c52e24194a741f9fca96e7aa965f0fa36af504 (patch)
treed710550c8cbe3a73cc737685b1666d5cfd8881e1 /drivers/gpu
parent9c25210fd30991e68f93e2ec0857de2d967b5766 (diff)
downloadop-kernel-dev-c9c52e24194a741f9fca96e7aa965f0fa36af504.zip
op-kernel-dev-c9c52e24194a741f9fca96e7aa965f0fa36af504.tar.gz
drm/i915/chv: Remove Wait for a previous gfx force-off
On CHV, PUNIT team confirmed that 'VLV_GFX_CLK_STATUS_BIT' is not a sticky bit and it will always be set. So ignore Check for previous Gfx force off during suspend and allow the force clk as part S0ix Sequence Signed-off-by: Deepak S <deepak.s@linux.intel.com> Cc: stable@vger.kernel.org Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a8e6b7c..3fa3eae 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1200,11 +1200,13 @@ int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool force_on)
int err;
val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);
- WARN_ON(!!(val & VLV_GFX_CLK_FORCE_ON_BIT) == force_on);
#define COND (I915_READ(VLV_GTLC_SURVIVABILITY_REG) & VLV_GFX_CLK_STATUS_BIT)
/* Wait for a previous force-off to settle */
- if (force_on) {
+ if (force_on && !IS_CHERRYVIEW(dev_priv->dev)) {
+ /* WARN_ON only for the Valleyview */
+ WARN_ON(!!(val & VLV_GFX_CLK_FORCE_ON_BIT) == force_on);
+
err = wait_for(!COND, 20);
if (err) {
DRM_ERROR("timeout waiting for GFX clock force-off (%08x)\n",
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