diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2009-12-04 16:35:57 -0500 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2009-12-08 08:53:25 +1000 |
| commit | 2a008d0ccde4ce59a2714e132d5f86a0771e6422 (patch) | |
| tree | 51eabe644466b3601d77ebd8497e44e747acc981 /drivers/gpu | |
| parent | 92cde00cbaf3236ef7ea9bd4f0b43c8c4a3f507f (diff) | |
| download | op-kernel-dev-2a008d0ccde4ce59a2714e132d5f86a0771e6422.zip op-kernel-dev-2a008d0ccde4ce59a2714e132d5f86a0771e6422.tar.gz | |
drm/radeon/kms: more r4xx lvds fixes
Grab pll ref div from regs at driver init. r4xx seems very
picky about the dividers for the pll driving lvds.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_clocks.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 2 |
3 files changed, 16 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 89ac438..fba3c96 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -457,9 +457,8 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) if (encoder->encoder_type != DRM_MODE_ENCODER_DAC) pll_flags |= RADEON_PLL_NO_ODD_POST_DIV; - if (!ASIC_IS_AVIVO(rdev) - && (encoder->encoder_type == - DRM_MODE_ENCODER_LVDS)) + if (encoder->encoder_type == + DRM_MODE_ENCODER_LVDS) pll_flags |= RADEON_PLL_USE_REF_DIV; } radeon_encoder = to_radeon_encoder(encoder); diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index 2c541e0..b062109 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c @@ -106,8 +106,19 @@ void radeon_get_clock_info(struct drm_device *dev) ret = radeon_combios_get_clock_info(dev); if (ret) { - if (p1pll->reference_div < 2) - p1pll->reference_div = 12; + if (p1pll->reference_div < 2) { + if (!ASIC_IS_AVIVO(rdev)) { + u32 tmp = RREG32_PLL(RADEON_PPLL_REF_DIV); + if (ASIC_IS_R300(rdev)) + p1pll->reference_div = + (tmp & R300_PPLL_REF_DIV_ACC_MASK) >> R300_PPLL_REF_DIV_ACC_SHIFT; + else + p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK; + if (p1pll->reference_div < 2) + p1pll->reference_div = 12; + } else + p1pll->reference_div = 12; + } if (p2pll->reference_div < 2) p2pll->reference_div = 12; if (rdev->family < CHIP_RS600) { diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 1058ed0..b82ede9 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c @@ -819,8 +819,8 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) use_bios_divs = true; } } - pll_flags |= RADEON_PLL_USE_REF_DIV; } + pll_flags |= RADEON_PLL_USE_REF_DIV; } } } |
