diff options
author | Li Peng <peng.li@linux.intel.com> | 2010-06-12 23:38:35 +0800 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2010-06-14 18:24:13 -0700 |
commit | 45ac22c81b1088f5ac08dc5367f78c192d68d756 (patch) | |
tree | 9e9f161b881715db58bf38fbebfde9990fde4819 /drivers/gpu | |
parent | c496fa1fff0248ef8cd637efb52b70dea7afaa9d (diff) | |
download | op-kernel-dev-45ac22c81b1088f5ac08dc5367f78c192d68d756.zip op-kernel-dev-45ac22c81b1088f5ac08dc5367f78c192d68d756.tar.gz |
drm/i915: Turn on 945 self-refresh only if single CRTC is active
Enable self-refresh on 945 when just one CRTC is activated.
Otherwise user would get display flicker with dual display.
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=27667
Signed-off-by: Li Peng <peng.li@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a8d65b7..fdeff43 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4483,6 +4483,7 @@ static void intel_idle_update(struct work_struct *work) struct drm_device *dev = dev_priv->dev; struct drm_crtc *crtc; struct intel_crtc *intel_crtc; + int enabled = 0; if (!i915_powersave) return; @@ -4491,21 +4492,22 @@ static void intel_idle_update(struct work_struct *work) i915_update_gfx_val(dev_priv); - if (IS_I945G(dev) || IS_I945GM(dev)) { - DRM_DEBUG_DRIVER("enable memory self refresh on 945\n"); - I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN_MASK | FW_BLC_SELF_EN); - } - list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { /* Skip inactive CRTCs */ if (!crtc->fb) continue; + enabled++; intel_crtc = to_intel_crtc(crtc); if (!intel_crtc->busy) intel_decrease_pllclock(crtc); } + if ((enabled == 1) && (IS_I945G(dev) || IS_I945GM(dev))) { + DRM_DEBUG_DRIVER("enable memory self refresh on 945\n"); + I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN_MASK | FW_BLC_SELF_EN); + } + mutex_unlock(&dev->struct_mutex); } |