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| author | Rafael Barbalho <rafael.barbalho@intel.com> | 2014-04-09 13:28:40 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-05-20 15:20:27 +0200 |
| commit | e0d34ce7d0ca54aa45bc436823863a063f70c31a (patch) | |
| tree | dd5e361ba8fbe4bddff7aeed5ada10d68b4487a6 /drivers/gpu | |
| parent | b3f797ac492f85f3c8e7a52cd60d70eed117d332 (diff) | |
| download | op-kernel-dev-e0d34ce7d0ca54aa45bc436823863a063f70c31a.zip op-kernel-dev-e0d34ce7d0ca54aa45bc436823863a063f70c31a.tar.gz | |
drm/i915/chv: Implement WaDisableSamplerPowerBypass for CHV
Cherryview also needs this WA.
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
[vsyrjala: Looks like it's for pre-prodution hw only]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 605d8e9..1fff413 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5401,6 +5401,10 @@ static void cherryview_init_clock_gating(struct drm_device *dev) /* WaDisableSDEUnitClockGating:chv */ I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); + + /* WaDisableSamplerPowerBypass:chv (pre-production hw) */ + I915_WRITE(HALF_SLICE_CHICKEN3, + _MASKED_BIT_ENABLE(GEN8_SAMPLER_POWER_BYPASS_DIS)); } static void g4x_init_clock_gating(struct drm_device *dev) |
