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authorAlex Deucher <alexander.deucher@amd.com>2013-09-13 11:04:28 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-09-15 20:27:51 -0400
commitc2ee29d00266a9a80fb312042b14a56f8baf978d (patch)
tree587474373dcbf27f2a29063004531cd26b629bda /drivers/gpu
parente40210cca98068835acd5a4fe760bf96b3a1aa48 (diff)
downloadop-kernel-dev-c2ee29d00266a9a80fb312042b14a56f8baf978d.zip
op-kernel-dev-c2ee29d00266a9a80fb312042b14a56f8baf978d.tar.gz
drm/radeon/dpm/rs780: fix force_performance state for same sclks
If the low and high sclks within a power state are the same, there no need to enable sclk scaling. Enabling sclk scaling can cause display stability issues on some boards. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/rs780_dpm.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/rs780_dpm.c b/drivers/gpu/drm/radeon/rs780_dpm.c
index eb336bf..6af8505 100644
--- a/drivers/gpu/drm/radeon/rs780_dpm.c
+++ b/drivers/gpu/drm/radeon/rs780_dpm.c
@@ -1043,8 +1043,10 @@ int rs780_dpm_force_performance_level(struct radeon_device *rdev,
if (pi->voltage_control)
rs780_force_voltage(rdev, pi->max_voltage);
- WREG32_P(FVTHROT_FBDIV_REG1, 0, ~FORCE_FEEDBACK_DIV);
- rs780_clk_scaling_enable(rdev, true);
+ if (ps->sclk_high != ps->sclk_low) {
+ WREG32_P(FVTHROT_FBDIV_REG1, 0, ~FORCE_FEEDBACK_DIV);
+ rs780_clk_scaling_enable(rdev, true);
+ }
if (pi->voltage_control) {
rs780_voltage_scaling_enable(rdev, true);
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