summaryrefslogtreecommitdiffstats
path: root/drivers/gpu
diff options
context:
space:
mode:
authorAlex Deucher <alexander.deucher@amd.com>2011-10-24 12:57:57 -0400
committerDave Airlie <airlied@redhat.com>2011-11-01 16:01:55 +0000
commit06c9c2332cc3bffcc184f32ee503dc0a4eb83de0 (patch)
treeb109045b72843ff0c3d0e6f3fba65b97868920cb /drivers/gpu
parent9bb7703c5ea62ca1925cbfa0cd776f04de96fcf2 (diff)
downloadop-kernel-dev-06c9c2332cc3bffcc184f32ee503dc0a4eb83de0.zip
op-kernel-dev-06c9c2332cc3bffcc184f32ee503dc0a4eb83de0.tar.gz
drm/radeon/kms/cayman/blit: specify CP_COHER_CNTL2 with surface_sync
CP_COHER_CNTL2 has to be programmed manually when submitting packets to the ring directly rather than programmed via an IB. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/evergreen_blit_kms.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_blit_kms.c b/drivers/gpu/drm/radeon/evergreen_blit_kms.c
index 879f733..551e76f 100644
--- a/drivers/gpu/drm/radeon/evergreen_blit_kms.c
+++ b/drivers/gpu/drm/radeon/evergreen_blit_kms.c
@@ -94,6 +94,15 @@ cp_set_surface_sync(struct radeon_device *rdev,
else
cp_coher_size = ((size + 255) >> 8);
+ if (rdev->family >= CHIP_CAYMAN) {
+ /* CP_COHER_CNTL2 has to be set manually when submitting a surface_sync
+ * to the RB directly. For IBs, the CP programs this as part of the
+ * surface_sync packet.
+ */
+ radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
+ radeon_ring_write(rdev, (0x85e8 - PACKET3_SET_CONFIG_REG_START) >> 2);
+ radeon_ring_write(rdev, 0); /* CP_COHER_CNTL2 */
+ }
radeon_ring_write(rdev, PACKET3(PACKET3_SURFACE_SYNC, 3));
radeon_ring_write(rdev, sync_type);
radeon_ring_write(rdev, cp_coher_size);
@@ -621,6 +630,8 @@ int evergreen_blit_init(struct radeon_device *rdev)
rdev->r600_blit.ring_size_common += 10; /* fence emit for done copy */
rdev->r600_blit.ring_size_per_loop = 74;
+ if (rdev->family >= CHIP_CAYMAN)
+ rdev->r600_blit.ring_size_per_loop += 9; /* additional DWs for surface sync */
rdev->r600_blit.max_dim = 16384;
OpenPOWER on IntegriCloud