diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-11-08 23:17:34 +0000 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2012-01-27 23:08:45 -0800 |
| commit | d56d8b28e9247e7e35e02fbb12b12239a2c33ad1 (patch) | |
| tree | d69b969711797c490970d20c492a11b9b6faf28b /drivers/gpu | |
| parent | acb42a3b611d7ad4cb173c3b37674b549df2ffeb (diff) | |
| download | op-kernel-dev-d56d8b28e9247e7e35e02fbb12b12239a2c33ad1.zip op-kernel-dev-d56d8b28e9247e7e35e02fbb12b12239a2c33ad1.tar.gz | |
drm/i915:: Disable FBC on SandyBridge
Enabling FBC is causing the BLT ring to run between 10-100x slower than
normal and frequently lockup. The interim solution is disable FBC once
more until we know why.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b3b51c4..19f35ec 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1872,7 +1872,7 @@ static void intel_update_fbc(struct drm_device *dev) if (enable_fbc < 0) { DRM_DEBUG_KMS("fbc set to per-chip default\n"); enable_fbc = 1; - if (INTEL_INFO(dev)->gen <= 5) + if (INTEL_INFO(dev)->gen <= 6) enable_fbc = 0; } if (!enable_fbc) { |
