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authorJesse Barnes <jbarnes@virtuousgeek.org>2011-11-15 10:28:53 -0800
committerKeith Packard <keithp@keithp.com>2012-01-03 14:55:47 -0800
commit7a4198664d46b87025a64530f1530ab2bea54c19 (patch)
treec6388ac83d02d5f4cdc396308339a3cbe3363a85 /drivers/gpu
parente6bfaf854272ec4641a9ef7b1cb1ca963031ba95 (diff)
downloadop-kernel-dev-7a4198664d46b87025a64530f1530ab2bea54c19.zip
op-kernel-dev-7a4198664d46b87025a64530f1530ab2bea54c19.tar.gz
drm/i915: don't disable a PCH DPLL that's in use
If a PCH pipe PLL is being used by transcoder C, don't disable it. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 2e00c8a..bdab82b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1204,7 +1204,8 @@ static void intel_disable_pch_pll(struct drm_i915_private *dev_priv,
enum pipe pipe)
{
int reg;
- u32 val;
+ u32 val, pll_mask = TRANSC_DPLL_ENABLE | TRANSC_DPLLB_SEL,
+ pll_sel = TRANSC_DPLL_ENABLE;
if (pipe > 1)
return;
@@ -1215,6 +1216,15 @@ static void intel_disable_pch_pll(struct drm_i915_private *dev_priv,
/* Make sure transcoder isn't still depending on us */
assert_transcoder_disabled(dev_priv, pipe);
+ if (pipe == 0)
+ pll_sel |= TRANSC_DPLLA_SEL;
+ else if (pipe == 1)
+ pll_sel |= TRANSC_DPLLB_SEL;
+
+
+ if ((I915_READ(PCH_DPLL_SEL) & pll_mask) == pll_sel)
+ return;
+
reg = PCH_DPLL(pipe);
val = I915_READ(reg);
val &= ~DPLL_VCO_ENABLE;
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