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authorChris Wilson <chris@chris-wilson.co.uk>2009-02-11 14:26:30 +0000
committerDave Airlie <airlied@redhat.com>2009-02-20 12:21:11 +1000
commit2ebed176a7ee126448d34fc336afb2ea0238c280 (patch)
tree42a0ee990068af7be1a359d41ea141f4236a4c40 /drivers/gpu
parent8d59bae5d9aae10ab230561519bfb97962509bcb (diff)
downloadop-kernel-dev-2ebed176a7ee126448d34fc336afb2ea0238c280.zip
op-kernel-dev-2ebed176a7ee126448d34fc336afb2ea0238c280.tar.gz
drm/i915: Set framebuffer alignment based upon the fence constraints.
Set the request alignment to 0, and leave it up to i915_gem_object_pin() to set the appropriate alignment to match the fence covering the object. Eric Anholt mentioned that the pinning code is meant to choose the maximum of the request alignment and that of the fence covering the object... However currently, the pinning code will only apply the fence constraints if the supplied alignment is 0. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bbdd729..a440d0d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -377,10 +377,8 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
alignment = 64 * 1024;
break;
case I915_TILING_X:
- if (IS_I9XX(dev))
- alignment = 1024 * 1024;
- else
- alignment = 512 * 1024;
+ /* pin() will align the object as required by fence */
+ alignment = 0;
break;
case I915_TILING_Y:
/* FIXME: Is this true? */
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