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authorJesse Barnes <jbarnes@virtuousgeek.org>2010-08-11 10:06:44 -0700
committerJesse Barnes <jbarnes@virtuousgeek.org>2010-08-18 13:00:21 -0700
commit7643a7fa16edf180d593f705f4fa5930c40e8d2d (patch)
treed1ba775fb61c8344532e77ad51d099068c17c975 /drivers/gpu
parent37c6c9b0e941fbb7f37a93d36abaf5fcafea87a8 (diff)
downloadop-kernel-dev-7643a7fa16edf180d593f705f4fa5930c40e8d2d.zip
op-kernel-dev-7643a7fa16edf180d593f705f4fa5930c40e8d2d.tar.gz
drm/i915: eDP mode set sequence corrections
We should disable the panel first when shutting down an eDP link. And when turning one on, the panel needs to be enabled before link training or eDP I/O won't be enabled. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c17
1 files changed, 8 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index d1b4ece4..8061a48 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -840,20 +840,19 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
uint32_t dp_reg = I915_READ(intel_dp->output_reg);
if (mode != DRM_MODE_DPMS_ON) {
- if (dp_reg & DP_PORT_EN) {
- intel_dp_link_down(intel_dp);
- if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) {
- ironlake_edp_backlight_off(dev);
- ironlake_edp_panel_off(dev);
- }
+ if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) {
+ ironlake_edp_backlight_off(dev);
+ ironlake_edp_panel_off(dev);
}
+ if (dp_reg & DP_PORT_EN)
+ intel_dp_link_down(intel_dp);
} else {
if (!(dp_reg & DP_PORT_EN)) {
- intel_dp_link_train(intel_dp);
- if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp)) {
+ if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp))
ironlake_edp_panel_on(dev);
+ intel_dp_link_train(intel_dp);
+ if (IS_eDP(intel_dp) || IS_PCH_eDP(intel_dp))
ironlake_edp_backlight_on(dev);
- }
}
}
intel_dp->dpms_mode = mode;
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