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authorMaarten Maathuis <madman2003@gmail.com>2010-02-25 20:00:38 +0100
committerBen Skeggs <bskeggs@redhat.com>2010-03-10 16:07:35 +1000
commitce48fa93a6f5cadd4141a921dfb4129c8850374e (patch)
tree550350594fdae72ff50884c18adc9fbc1377a96e /drivers/gpu
parent81441570c9cbf453891d90f5725adbbfe5a9cc69 (diff)
downloadop-kernel-dev-ce48fa93a6f5cadd4141a921dfb4129c8850374e.zip
op-kernel-dev-ce48fa93a6f5cadd4141a921dfb4129c8850374e.tar.gz
drm/nv50: add a memory barrier to pushbuf submission
- This is useful for vram pushbuffers that are write combined. - pre-nv50 has one too (in WRITE_PUT). Signed-off-by: Maarten Maathuis <madman2003@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dma.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index c8482a1..65c441a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -190,6 +190,11 @@ nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo,
nouveau_bo_wr32(pb, ip++, upper_32_bits(offset) | length << 8);
chan->dma.ib_put = (chan->dma.ib_put + 1) & chan->dma.ib_max;
+
+ DRM_MEMORYBARRIER();
+ /* Flush writes. */
+ nouveau_bo_rd32(pb, 0);
+
nvchan_wr32(chan, 0x8c, chan->dma.ib_put);
chan->dma.ib_free--;
}
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