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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-01-12 20:33:01 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2011-01-13 16:06:05 +0000 |
| commit | c37d9a5de94a6fe60a756af350cd21aa9bbbc8a1 (patch) | |
| tree | baf3dbb044dfcec7add270661400e097026153df /drivers/gpu | |
| parent | a76150302d6e7ebc43e1a1ddaee7fd51db8da3b3 (diff) | |
| download | op-kernel-dev-c37d9a5de94a6fe60a756af350cd21aa9bbbc8a1.zip op-kernel-dev-c37d9a5de94a6fe60a756af350cd21aa9bbbc8a1.tar.gz | |
drm/i915: Fix error handler to capture the first batch after the seqno
Whilst we had no older batches on the active list, everything was fine.
However, if the GPU is free running and the requests are only being
reaped by the periodic retirer, than the current seqno may not be at the
start of the list. In this case we need to select the first batch after
the last seqno written by the gpu and not inclusive of the seqno.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index e418e8b..b8e509a 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -720,7 +720,7 @@ i915_error_first_batchbuffer(struct drm_i915_private *dev_priv, if (obj->ring != ring) continue; - if (!i915_seqno_passed(obj->last_rendering_seqno, seqno)) + if (i915_seqno_passed(seqno, obj->last_rendering_seqno)) continue; if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0) |
