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authorJesse Barnes <jbarnes@virtuousgeek.org>2010-07-23 12:03:37 -0700
committerEric Anholt <eric@anholt.net>2010-07-26 10:45:55 -0700
commitbe9a3dbf65a69933b06011f049b1e2fdfa6bc8b9 (patch)
treeb6f127f19fc374bbdf8932b945c65f2a86d00703 /drivers/gpu
parent6f772d7e2f4105470b9f3d0f0b26f06f61b1278d (diff)
downloadop-kernel-dev-be9a3dbf65a69933b06011f049b1e2fdfa6bc8b9.zip
op-kernel-dev-be9a3dbf65a69933b06011f049b1e2fdfa6bc8b9.tar.gz
drm/i915: handle shared framebuffers when flipping
If a framebuffer is shared across CRTCs, the x,y position of one of them is likely to be something other than the origin (e.g. for extended desktop configs). So calculate the offset at flip time so such configurations can work. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=28518. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Thomas M. <tmezzadra@gmail.com> Tested-by: fangxun <xunx.fang@intel.com> Cc: stable@kernel.org Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 68dcf36..ab8162a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4695,7 +4695,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
struct drm_gem_object *obj;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_unpin_work *work;
- unsigned long flags;
+ unsigned long flags, offset;
int pipesrc_reg = (intel_crtc->pipe == 0) ? PIPEASRC : PIPEBSRC;
int ret, pipesrc;
u32 flip_mask;
@@ -4762,19 +4762,23 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
while (I915_READ(ISR) & flip_mask)
;
+ /* Offset into the new buffer for cases of shared fbs between CRTCs */
+ offset = obj_priv->gtt_offset;
+ offset += (crtc->y * fb->pitch) + (crtc->x * (fb->bits_per_pixel) / 8);
+
BEGIN_LP_RING(4);
if (IS_I965G(dev)) {
OUT_RING(MI_DISPLAY_FLIP |
MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
OUT_RING(fb->pitch);
- OUT_RING(obj_priv->gtt_offset | obj_priv->tiling_mode);
+ OUT_RING(offset | obj_priv->tiling_mode);
pipesrc = I915_READ(pipesrc_reg);
OUT_RING(pipesrc & 0x0fff0fff);
} else {
OUT_RING(MI_DISPLAY_FLIP_I915 |
MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
OUT_RING(fb->pitch);
- OUT_RING(obj_priv->gtt_offset);
+ OUT_RING(offset);
OUT_RING(MI_NOOP);
}
ADVANCE_LP_RING();
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