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author | Chris Wilson <chris@chris-wilson.co.uk> | 2013-09-04 10:54:30 +0100 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-06 07:42:32 +0200 |
commit | 1c5fd08520de35c7ac0d70e2ed3c3bb200830447 (patch) | |
tree | 492e7d55143360255446b942e162c57ec71dfd71 /drivers/gpu | |
parent | 6644a4e9422fe19293599d1fef0bd292f4ca72a6 (diff) | |
download | op-kernel-dev-1c5fd08520de35c7ac0d70e2ed3c3bb200830447.zip op-kernel-dev-1c5fd08520de35c7ac0d70e2ed3c3bb200830447.tar.gz |
drm/i915: Confine page flips to BCS on Valleyview
Once again we find that Valleyview is ever so subtlety different from
the rest of its gen7 brethen. In this case, Valleyview has no support
for pageflipping from the RCS ring.
Fixes a regression from
commit ffe74d75502e3a9b0791240b5562bcbecc6ab8dc
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Mon Aug 26 20:58:12 2013 +0100
drm/i915: Use RCS flips on Ivybridge+
Reported-by: "Lee, Chon Ming" <chon.ming.lee@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68968
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0534d5b..0ee8901 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7844,7 +7844,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev, int len, ret; ring = obj->ring; - if (ring == NULL || ring->id != RCS) + if (IS_VALLEYVIEW(dev) || ring == NULL || ring->id != RCS) ring = &dev_priv->ring[BCS]; ret = intel_pin_and_fence_fb_obj(dev, obj, ring); |