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authorAlex Deucher <alexander.deucher@amd.com>2013-10-23 16:13:42 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-10-23 16:25:18 -0400
commitcdf6e8058415ba4d808537e30a0a6be9fb29e95a (patch)
tree9ce8ecf12c509ae70e0158ce96bc147e900a276b /drivers/gpu/drm
parentd48d88b21ede7990702b990bc36262c3d5fd7a1f (diff)
downloadop-kernel-dev-cdf6e8058415ba4d808537e30a0a6be9fb29e95a.zip
op-kernel-dev-cdf6e8058415ba4d808537e30a0a6be9fb29e95a.tar.gz
drm/radeon/dpm: fix incompatible casting on big endian
We use u16 for voltage values throughout the driver so switch the table values to a u16 as well. Fixes an incompatible cast error in ci_patch_clock_voltage_limits_with_vddc_leakage() picked up by coverity. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index a400ac1..24f4960 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1272,8 +1272,8 @@ struct radeon_blacklist_clocks
struct radeon_clock_and_voltage_limits {
u32 sclk;
u32 mclk;
- u32 vddc;
- u32 vddci;
+ u16 vddc;
+ u16 vddci;
};
struct radeon_clock_array {
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