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author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-08-21 23:38:08 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-08-23 14:52:36 +0200 |
commit | 35d8f2eb259e2d32c4bb67e9733ba0cba031f64f (patch) | |
tree | 690ec34175ddf88ac877e42688bc2c3c12f85e71 /drivers/gpu/drm | |
parent | e27e9708c45879f16fb824a2da94cd65e150a0c8 (diff) | |
download | op-kernel-dev-35d8f2eb259e2d32c4bb67e9733ba0cba031f64f.zip op-kernel-dev-35d8f2eb259e2d32c4bb67e9733ba0cba031f64f.tar.gz |
drm/i915: Use POSTING_READ in lcpll code
If we don't use the return value of a mmio read our coding style is to
use the POSTING_READ macro. This avoids cluttering the mmio traces.
While at it add the missing posting read in the lcpll enable function
that Paulo spotted.
v2: Drop the _NOTRACE changes, tracing such wait_for loops in the modeset
code might actually be rather useful!
Cc: Paulo Zanoni <przanoni@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b29954a..b4daa64 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6036,13 +6036,14 @@ void hsw_restore_lcpll(struct drm_i915_private *dev_priv) if (val & LCPLL_POWER_DOWN_ALLOW) { val &= ~LCPLL_POWER_DOWN_ALLOW; I915_WRITE(LCPLL_CTL, val); + POSTING_READ(LCPLL_CTL); } val = I915_READ(D_COMP); val |= D_COMP_COMP_FORCE; val &= ~D_COMP_COMP_DISABLE; I915_WRITE(D_COMP, val); - I915_READ(D_COMP); + POSTING_READ(D_COMP); val = I915_READ(LCPLL_CTL); val &= ~LCPLL_PLL_DISABLE; |