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| author | Imre Deak <imre.deak@intel.com> | 2016-09-14 13:04:13 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2016-10-10 16:06:35 +0300 |
| commit | 11dec6a2940c8c8b0791aecdab87f9c9b1371d11 (patch) | |
| tree | a3427fa8b6bc8c16380e774ce78d0b35ba1f15f6 /drivers/gpu/drm | |
| parent | 915b417946030e1f365c63728875cffd8db8e880 (diff) | |
| download | op-kernel-dev-11dec6a2940c8c8b0791aecdab87f9c9b1371d11.zip op-kernel-dev-11dec6a2940c8c8b0791aecdab87f9c9b1371d11.tar.gz | |
drm/i915: Unlock PPS registers after GPU reset
Reapply the PPS register unlock workaround after GPU reset on platforms
where the reset clobbers the display HW state. This at least gets rid of
the related WARN during LVDS encoder enabling on PNV.
Fixes: ed6143b8f75 ("drm/i915/lvds: Restore initial HW state during encoder enabling")
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1473847453-4771-1-git-send-email-imre.deak@intel.com
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
(cherry picked from commit 51f592050a523fc5882f9b8b4e9259422e41e848)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ad8d712..992ddf8 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3629,6 +3629,7 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) intel_runtime_pm_disable_interrupts(dev_priv); intel_runtime_pm_enable_interrupts(dev_priv); + intel_pps_unlock_regs_wa(dev_priv); intel_modeset_init_hw(dev); spin_lock_irq(&dev_priv->irq_lock); |
