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authorTomi Valkeinen <tomi.valkeinen@ti.com>2015-10-19 12:30:03 +0300
committerJyri Sarha <jsarha@ti.com>2016-02-25 16:39:36 +0200
commit65734a262350a746100dcfd85a81f7dc1b69dd10 (patch)
treeece0c53ee91128a8237653f2a17686ea9ef749f7 /drivers/gpu/drm/tilcdc
parent29ddd6e171abae990a881b9e221359f13c546369 (diff)
downloadop-kernel-dev-65734a262350a746100dcfd85a81f7dc1b69dd10.zip
op-kernel-dev-65734a262350a746100dcfd85a81f7dc1b69dd10.tar.gz
drm/tilcdc: cleanup runtime PM handling
Cleanup runtime PM handling. Before the patch the usage of pm_runtime calls was inconsistent and hard to follow. After the update the pm_runtime calls are removed from set_scanout() and called around major operations that access the HW. After the patch the DPMS code does not have pm_runtime_forbid/allow calls any more and pm_runtime_irq_safe() is not set anymore. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> [Added description to the patch] Signed-off-by: Jyri Sarha <jsarha@ti.com>
Diffstat (limited to 'drivers/gpu/drm/tilcdc')
-rw-r--r--drivers/gpu/drm/tilcdc/tilcdc_crtc.c19
-rw-r--r--drivers/gpu/drm/tilcdc/tilcdc_drv.c1
2 files changed, 11 insertions, 9 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 465fd04..08b1e03 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -71,7 +71,6 @@ static void set_scanout(struct drm_crtc *crtc, int n)
struct drm_device *dev = crtc->dev;
struct tilcdc_drm_private *priv = dev->dev_private;
- pm_runtime_get_sync(dev->dev);
tilcdc_write(dev, base_reg[n], tilcdc_crtc->start);
tilcdc_write(dev, ceil_reg[n], tilcdc_crtc->end);
if (tilcdc_crtc->scanout[n]) {
@@ -81,7 +80,6 @@ static void set_scanout(struct drm_crtc *crtc, int n)
tilcdc_crtc->scanout[n] = crtc->primary->fb;
drm_framebuffer_reference(tilcdc_crtc->scanout[n]);
tilcdc_crtc->dirty &= ~stat[n];
- pm_runtime_put_sync(dev->dev);
}
static void update_scanout(struct drm_crtc *crtc)
@@ -186,8 +184,13 @@ static int tilcdc_crtc_page_flip(struct drm_crtc *crtc,
crtc->primary->fb = fb;
tilcdc_crtc->event = event;
+
+ pm_runtime_get_sync(dev->dev);
+
update_scanout(crtc);
+ pm_runtime_put_sync(dev->dev);
+
return 0;
}
@@ -206,10 +209,8 @@ void tilcdc_crtc_dpms(struct drm_crtc *crtc, int mode)
tilcdc_crtc->dpms = mode;
- pm_runtime_get_sync(dev->dev);
-
if (mode == DRM_MODE_DPMS_ON) {
- pm_runtime_forbid(dev->dev);
+ pm_runtime_get_sync(dev->dev);
start(crtc);
} else {
tilcdc_crtc->frame_done = false;
@@ -227,10 +228,9 @@ void tilcdc_crtc_dpms(struct drm_crtc *crtc, int mode)
if (ret == 0)
dev_err(dev->dev, "timeout waiting for framedone\n");
}
- pm_runtime_allow(dev->dev);
- }
- pm_runtime_put_sync(dev->dev);
+ pm_runtime_put_sync(dev->dev);
+ }
}
static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc,
@@ -455,13 +455,16 @@ static int tilcdc_crtc_mode_set(struct drm_crtc *crtc,
static int tilcdc_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
struct drm_framebuffer *old_fb)
{
+ struct drm_device *dev = crtc->dev;
int r;
r = tilcdc_verify_fb(crtc, crtc->primary->fb);
if (r)
return r;
+ pm_runtime_get_sync(dev->dev);
update_scanout(crtc);
+ pm_runtime_put_sync(dev->dev);
return 0;
}
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 47096b1..47f0e02 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -230,7 +230,6 @@ static int tilcdc_load(struct drm_device *dev, unsigned long flags)
DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
pm_runtime_enable(dev->dev);
- pm_runtime_irq_safe(dev->dev);
/* Determine LCD IP Version */
pm_runtime_get_sync(dev->dev);
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