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authorThierry Reding <treding@nvidia.com>2014-11-13 14:27:29 +0100
committerThierry Reding <treding@nvidia.com>2014-11-13 16:12:10 +0100
commit183ef2883d060d69d17d63f7c56fbf1a5d65e3f9 (patch)
treeaf87185c07e47a1c0397723922b03d279bcaedad /drivers/gpu/drm/tegra
parent976cebc35bed0456a42bf96073a26f251d23b264 (diff)
downloadop-kernel-dev-183ef2883d060d69d17d63f7c56fbf1a5d65e3f9.zip
op-kernel-dev-183ef2883d060d69d17d63f7c56fbf1a5d65e3f9.tar.gz
drm/tegra: dsi: Do not manage clock on enable/disable
In preparation for supporting command mode panels, don't disable the clock when the output is disabled. The output will be enabled only after the panel has been programmed in command mode, so the clock must always remain on. As a side-effect, pad calibration now only needs to be done at driver probe time, since neither power nor controller state will go away before driver removal. While at it, use a 32-bit variable to store register content because the registers are 32-bit even on 64-bit Tegra. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra')
-rw-r--r--drivers/gpu/drm/tegra/dsi.c29
1 files changed, 14 insertions, 15 deletions
diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index 584b771..c62f680 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -456,12 +456,6 @@ static int tegra_output_dsi_enable(struct tegra_output *output)
if (err < 0)
return err;
- err = clk_enable(dsi->clk);
- if (err < 0)
- return err;
-
- reset_control_deassert(dsi->rst);
-
value = DSI_CONTROL_CHANNEL(0) | DSI_CONTROL_FORMAT(format) |
DSI_CONTROL_LANES(dsi->lanes - 1) |
DSI_CONTROL_SOURCE(dc->pipe);
@@ -576,8 +570,6 @@ static int tegra_output_dsi_disable(struct tegra_output *output)
tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
}
- clk_disable(dsi->clk);
-
dsi->enabled = false;
return 0;
@@ -695,7 +687,7 @@ static int tegra_dsi_pad_enable(struct tegra_dsi *dsi)
static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi)
{
- unsigned long value;
+ u32 value;
tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_0);
tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_1);
@@ -736,12 +728,6 @@ static int tegra_dsi_init(struct host1x_client *client)
dev_err(dsi->dev, "debugfs setup failed: %d\n", err);
}
- err = tegra_dsi_pad_calibrate(dsi);
- if (err < 0) {
- dev_err(dsi->dev, "MIPI calibration failed: %d\n", err);
- return err;
- }
-
return 0;
}
@@ -863,6 +849,13 @@ static int tegra_dsi_probe(struct platform_device *pdev)
if (IS_ERR(dsi->rst))
return PTR_ERR(dsi->rst);
+ err = reset_control_deassert(dsi->rst);
+ if (err < 0) {
+ dev_err(&pdev->dev, "failed to bring DSI out of reset: %d\n",
+ err);
+ return err;
+ }
+
dsi->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(dsi->clk)) {
dev_err(&pdev->dev, "cannot get DSI clock\n");
@@ -926,6 +919,12 @@ static int tegra_dsi_probe(struct platform_device *pdev)
if (IS_ERR(dsi->mipi))
return PTR_ERR(dsi->mipi);
+ err = tegra_dsi_pad_calibrate(dsi);
+ if (err < 0) {
+ dev_err(dsi->dev, "MIPI calibration failed: %d\n", err);
+ return err;
+ }
+
dsi->host.ops = &tegra_dsi_host_ops;
dsi->host.dev = &pdev->dev;
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