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authorThierry Reding <treding@nvidia.com>2014-11-28 13:14:55 +0100
committerThierry Reding <treding@nvidia.com>2015-01-27 10:14:57 +0100
commit8f604f8c4dd2d5383f567856450ba12764061c12 (patch)
tree67dcf2f73bcb748ee5b22a8e3ca70ca5d5cee9f9 /drivers/gpu/drm/tegra/drm.h
parent47802b09a9c2d1f8a562c7fae2f61a8923ac8d06 (diff)
downloadop-kernel-dev-8f604f8c4dd2d5383f567856450ba12764061c12.zip
op-kernel-dev-8f604f8c4dd2d5383f567856450ba12764061c12.tar.gz
drm/tegra: Track tiling and format in plane state
Tracking these in the plane state allows them to be computed in the ->atomic_check() callback and reused when applying the configuration in ->atomic_update(). Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/drm.h')
-rw-r--r--drivers/gpu/drm/tegra/drm.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
index b1c7027..8cb2dfe 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/drm/tegra/drm.h
@@ -170,13 +170,13 @@ struct tegra_dc_window {
unsigned int h;
} dst;
unsigned int bits_per_pixel;
- unsigned int format;
- unsigned int swap;
unsigned int stride[2];
unsigned long base[3];
bool bottom_up;
struct tegra_bo_tiling tiling;
+ u32 format;
+ u32 swap;
};
/* from dc.c */
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