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authorPixel Ding <Pixel.Ding@amd.com>2018-04-24 22:52:45 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-05-15 13:44:05 -0500
commit5dd3f9efd4199f0d9e8244322934494ebd140dfd (patch)
treecbf6cf6a3eac6f84bf7d5cfa73ab5a8dead9acec /drivers/gpu/drm/scheduler
parenteda8377d1628caa07b642fce8fcd1938010e949f (diff)
downloadop-kernel-dev-5dd3f9efd4199f0d9e8244322934494ebd140dfd.zip
op-kernel-dev-5dd3f9efd4199f0d9e8244322934494ebd140dfd.tar.gz
drm/scheduler: don't update last scheduled fence in TDR
The current sequence in scheduler thread is: 1. update last sched fence 2. job begin (adding to mirror list) 3. job finish (remove from mirror list) 4. back to 1 Since we update last sched prior to joining mirror list, the jobs in mirror list already pass the last sched fence. TDR just run the jobs in mirror list, so we should not update the last sched fences in TDR. Signed-off-by: Pixel Ding <Pixel.Ding@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/scheduler')
-rw-r--r--drivers/gpu/drm/scheduler/gpu_scheduler.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/scheduler/gpu_scheduler.c b/drivers/gpu/drm/scheduler/gpu_scheduler.c
index 088ff2b..1f1dd70 100644
--- a/drivers/gpu/drm/scheduler/gpu_scheduler.c
+++ b/drivers/gpu/drm/scheduler/gpu_scheduler.c
@@ -575,9 +575,6 @@ void drm_sched_job_recovery(struct drm_gpu_scheduler *sched)
fence = sched->ops->run_job(s_job);
atomic_inc(&sched->hw_rq_count);
- dma_fence_put(s_job->entity->last_scheduled);
- s_job->entity->last_scheduled = dma_fence_get(&s_fence->finished);
-
if (fence) {
s_fence->parent = dma_fence_get(fence);
r = dma_fence_add_callback(fence, &s_fence->cb,
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