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authorAlex Deucher <alexander.deucher@amd.com>2015-05-11 22:01:54 +0200
committerAlex Deucher <alexander.deucher@amd.com>2015-05-26 10:31:24 -0400
commitd55a43a3e9258c01a6cac2f3081b3ceaa8e58020 (patch)
tree60954b60b921a5076a092fc69f8f66edf8d19f86 /drivers/gpu/drm/radeon/sid.h
parenta918efab631a5112d9d168700458317ad77f269c (diff)
downloadop-kernel-dev-d55a43a3e9258c01a6cac2f3081b3ceaa8e58020.zip
op-kernel-dev-d55a43a3e9258c01a6cac2f3081b3ceaa8e58020.tar.gz
drm/radeon: add support for vce 1.0 clock gating
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/sid.h')
-rw-r--r--drivers/gpu/drm/radeon/sid.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index 4823a07..4c4a721 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -1894,6 +1894,7 @@
#define VCE_RB_RPTR 0x2018c
#define VCE_RB_WPTR 0x20190
#define VCE_CLOCK_GATING_A 0x202f8
+# define CGC_DYN_CLOCK_MODE (1 << 16)
#define VCE_CLOCK_GATING_B 0x202fc
#define VCE_UENC_CLOCK_GATING 0x205bc
#define VCE_UENC_REG_CLOCK_GATING 0x205c0
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