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authorAlex Deucher <alexander.deucher@amd.com>2013-02-14 10:04:02 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-02-20 08:51:20 -0500
commit454d2e2a32f02a4f8e0364ba0e8ce4f8dbe9810c (patch)
treec9727360424260a40aba4b037bbca4457efe4c1d /drivers/gpu/drm/radeon/sid.h
parent0e34d0945ed16aeb72c863be4efe4cd0c62f9c53 (diff)
downloadop-kernel-dev-454d2e2a32f02a4f8e0364ba0e8ce4f8dbe9810c.zip
op-kernel-dev-454d2e2a32f02a4f8e0364ba0e8ce4f8dbe9810c.tar.gz
drm/radeon: add a asic callback to get the xclk
This is required to get the reference clock used by the gfx engine for things like timestamps. Fixes support for GL extensions the use timestamps on certain boards. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/sid.h')
-rw-r--r--drivers/gpu/drm/radeon/sid.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index 07fc455..23fc08f 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -58,6 +58,11 @@
#define VGA_HDP_CONTROL 0x328
#define VGA_MEMORY_DISABLE (1 << 4)
+#define CG_CLKPIN_CNTL 0x660
+# define XTALIN_DIVIDE (1 << 1)
+#define CG_CLKPIN_CNTL_2 0x664
+# define MUX_TCLK_TO_XCLK (1 << 8)
+
#define DMIF_ADDR_CONFIG 0xBD4
#define SRBM_STATUS 0xE50
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