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| author | Alex Deucher <alexdeucher@gmail.com> | 2010-03-08 12:55:16 -0500 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2010-03-15 09:56:46 +1000 |
| commit | 86cb2bbfda2cf402aee46779ee90bbb7d915482b (patch) | |
| tree | 341bcd42fe9bc49498905f97f2e61b2def21f22b /drivers/gpu/drm/radeon/radeon_mode.h | |
| parent | b792210e7d1f9fb102061e2016da96cf2ad5cdbd (diff) | |
| download | op-kernel-dev-86cb2bbfda2cf402aee46779ee90bbb7d915482b.zip op-kernel-dev-86cb2bbfda2cf402aee46779ee90bbb7d915482b.tar.gz | |
drm/radeon/kms: use lcd pll limits when available
The bios has alternate pll output limits for LCD panels.
If available, use these for pll divider calculations.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_mode.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 1702b82..b868ffa 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h @@ -129,6 +129,7 @@ struct radeon_tmds_pll { #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) #define RADEON_PLL_USE_POST_DIV (1 << 12) +#define RADEON_PLL_IS_LCD (1 << 13) /* pll algo */ enum radeon_pll_algo { @@ -149,6 +150,8 @@ struct radeon_pll { uint32_t pll_in_max; uint32_t pll_out_min; uint32_t pll_out_max; + uint32_t lcd_pll_out_min; + uint32_t lcd_pll_out_max; uint32_t best_vco; /* divider limits */ |
