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| author | Alex Deucher <alexdeucher@gmail.com> | 2010-12-16 18:40:29 -0500 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2010-12-21 12:58:18 +1000 |
| commit | b61c99de8e7905916d1508ba7c9a9c08656e169d (patch) | |
| tree | e6805df26c18166ade50ca071a67f00fdecd443b /drivers/gpu/drm/radeon/radeon_encoders.c | |
| parent | 48c36c8f9a3e881953bb72deb55623a53795a684 (diff) | |
| download | op-kernel-dev-b61c99de8e7905916d1508ba7c9a9c08656e169d.zip op-kernel-dev-b61c99de8e7905916d1508ba7c9a9c08656e169d.tar.gz | |
drm/radeon/kms: fix DCE4.1 dig routing (v2)
Works more like DCE4.0 despite what the docs say.
This fixes blank screen issues when changing crtc
routing due to incorrect crtc to dig mapping.
v2: only two DIGx blocks, routing is hardcoded
based on link.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_encoders.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_encoders.c | 54 |
1 files changed, 25 insertions, 29 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index e4e64a8..55b84b8 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c @@ -910,15 +910,9 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t else args.v3.ucLaneNum = 4; - if (ASIC_IS_DCE41(rdev)) { - args.v3.acConfig.ucEncoderSel = dig->dig_encoder; - if (dig->linkb) - args.v3.acConfig.ucLinkSel = 1; - } else { - if (dig->linkb) { - args.v3.acConfig.ucLinkSel = 1; - args.v3.acConfig.ucEncoderSel = 1; - } + if (dig->linkb) { + args.v3.acConfig.ucLinkSel = 1; + args.v3.acConfig.ucEncoderSel = 1; } /* Select the PLL for the PHY @@ -1535,32 +1529,34 @@ static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder) struct radeon_encoder_atom_dig *dig; uint32_t dig_enc_in_use = 0; - /* on DCE41 and encoder can driver any phy so just crtc id */ - if (ASIC_IS_DCE41(rdev)) { - return radeon_crtc->crtc_id; - } - if (ASIC_IS_DCE4(rdev)) { dig = radeon_encoder->enc_priv; - switch (radeon_encoder->encoder_id) { - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: + if (ASIC_IS_DCE41(rdev)) { if (dig->linkb) return 1; else return 0; - break; - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: - if (dig->linkb) - return 3; - else - return 2; - break; - case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: - if (dig->linkb) - return 5; - else - return 4; - break; + } else { + switch (radeon_encoder->encoder_id) { + case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: + if (dig->linkb) + return 1; + else + return 0; + break; + case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: + if (dig->linkb) + return 3; + else + return 2; + break; + case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: + if (dig->linkb) + return 5; + else + return 4; + break; + } } } |
