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authorAlex Deucher <alexdeucher@gmail.com>2009-09-21 14:48:45 +1000
committerDave Airlie <airlied@redhat.com>2009-09-21 14:48:45 +1000
commitaadd4e17452d3d5c2269cd2b000b7de7cfb6c79e (patch)
tree7db901a331809805874891319e0624c055a08662 /drivers/gpu/drm/radeon/radeon_drv.h
parent5a6e9f9658c853fea8ebbf64cd36287f00a011a2 (diff)
downloadop-kernel-dev-aadd4e17452d3d5c2269cd2b000b7de7cfb6c79e.zip
op-kernel-dev-aadd4e17452d3d5c2269cd2b000b7de7cfb6c79e.tar.gz
drm/radeon: some r420s have a CP race with the DMA engine.
This patch makes sure the CP doesn't DMA do VRAM while 2D is active by inserting a CP resync token. todo: port to kms. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_drv.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index bc79ad6..cb0cfe4 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -1099,6 +1099,9 @@ extern u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index);
# define RADEON_CSQ_PRIBM_INDBM (4 << 28)
# define RADEON_CSQ_PRIPIO_INDPIO (15 << 28)
+#define R300_CP_RESYNC_ADDR 0x0778
+#define R300_CP_RESYNC_DATA 0x077c
+
#define RADEON_AIC_CNTL 0x01d0
# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
# define RS400_MSI_REARM (1 << 3)
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