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authorMario Kleiner <mario.kleiner.de@gmail.com>2014-06-07 03:38:11 +0200
committerAlex Deucher <alexander.deucher@amd.com>2014-06-13 12:22:30 -0400
commit4366f3b5f5a971cf348c298716b2cb29aab6ef4f (patch)
tree84b5d4c51f934f314de9f2700359a6d6686e91d2 /drivers/gpu/drm/radeon/radeon_display.c
parent8bae42769da2346f7b3c783980f038826e09e84c (diff)
downloadop-kernel-dev-4366f3b5f5a971cf348c298716b2cb29aab6ef4f.zip
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drm/radeon: Bypass hw lut's for > 8 bpc framebuffer scanout.
The hardware lut's only have 256 slots for indexing by a 8 bpc framebuffer. In 10 bpc scanout modes, framebuffer color values would get truncated to their 8 msb's, thereby losing the extra precision afforded by a 10 bpc framebuffer. To retain full precision, bypass the hw lut in 10 bpc scanout mode. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_display.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 5ed6170..4db2642 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -66,7 +66,8 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc)
(radeon_crtc->lut_b[i] << 0));
}
- WREG32(AVIVO_D1GRPH_LUT_SEL + radeon_crtc->crtc_offset, radeon_crtc->crtc_id);
+ /* Only change bit 0 of LUT_SEL, other bits are set elsewhere */
+ WREG32_P(AVIVO_D1GRPH_LUT_SEL + radeon_crtc->crtc_offset, radeon_crtc->crtc_id, ~1);
}
static void dce4_crtc_load_lut(struct drm_crtc *crtc)
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