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| author | Jiri Kosina <jkosina@suse.cz> | 2011-07-11 14:15:48 +0200 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2011-07-11 14:15:55 +0200 |
| commit | b7e9c223be8ce335e30f2cf6ba588e6a4092275c (patch) | |
| tree | 2d1e3b75606abc18df7ad65e51ac3f90cd68b38d /drivers/gpu/drm/radeon/radeon_clocks.c | |
| parent | c172d82500a6cf3c32d1e650722a1055d72ce858 (diff) | |
| parent | e3bbfa78bab125f58b831b5f7f45b5a305091d72 (diff) | |
| download | op-kernel-dev-b7e9c223be8ce335e30f2cf6ba588e6a4092275c.zip op-kernel-dev-b7e9c223be8ce335e30f2cf6ba588e6a4092275c.tar.gz | |
Merge branch 'master' into for-next
Sync with Linus' tree to be able to apply pending patches that
are based on newer code already present upstream.
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_clocks.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_clocks.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index 5249af8..2d48e7a 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c @@ -117,7 +117,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; if (p1pll->reference_div < 2) p1pll->reference_div = 12; - p2pll->reference_div = p1pll->reference_div; + p2pll->reference_div = p1pll->reference_div; /* These aren't in the device-tree */ if (rdev->family >= CHIP_R420) { @@ -139,6 +139,8 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) p2pll->pll_out_min = 12500; p2pll->pll_out_max = 35000; } + /* not sure what the max should be in all cases */ + rdev->clock.max_pixel_clock = 35000; spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; spll->reference_div = mpll->reference_div = @@ -151,7 +153,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) else rdev->clock.default_sclk = radeon_legacy_get_engine_clock(rdev); - + val = of_get_property(dp, "ATY,MCLK", NULL); if (val && *val) rdev->clock.default_mclk = (*val) / 10; @@ -160,7 +162,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) radeon_legacy_get_memory_clock(rdev); DRM_INFO("Using device-tree clock info\n"); - + return true; } #else |
