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| author | Alex Deucher <alexander.deucher@amd.com> | 2013-08-20 20:01:18 -0400 |
|---|---|---|
| committer | Christian König <christian.koenig@amd.com> | 2014-02-18 16:11:28 +0100 |
| commit | b59b733397cac70be5b04c60e8810077ac6ca48d (patch) | |
| tree | cb6cc21df27789855fa66267bd08ab6e2fe09474 /drivers/gpu/drm/radeon/radeon.h | |
| parent | 98ccc291ffdc34ccb9b13f0c29cc51d6eab24022 (diff) | |
| download | op-kernel-dev-b59b733397cac70be5b04c60e8810077ac6ca48d.zip op-kernel-dev-b59b733397cac70be5b04c60e8810077ac6ca48d.tar.gz | |
drm/radeon: add callback for setting vce clocks
Similar to uvd clock setting.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index d1491d4..2b26feb 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -1822,6 +1822,7 @@ struct radeon_asic { void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); void (*set_clock_gating)(struct radeon_device *rdev, int enable); int (*set_uvd_clocks)(struct radeon_device *rdev, u32 vclk, u32 dclk); + int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk); int (*get_temperature)(struct radeon_device *rdev); } pm; /* dynamic power management */ @@ -2683,6 +2684,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) #define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e)) #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) +#define radeon_set_vce_clocks(rdev, ev, ec) (rdev)->asic->pm.set_vce_clocks((rdev), (ev), (ec)) #define radeon_get_temperature(rdev) (rdev)->asic->pm.get_temperature((rdev)) #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s))) #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r))) |
