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authorRafał Miłecki <zajec5@gmail.com>2010-03-06 13:03:33 +0000
committerDave Airlie <airlied@redhat.com>2010-03-15 10:01:40 +1000
commit808032ee296ee7b37a6df090be40a330e09ae30e (patch)
tree016c8f92827027a846019b82906e157188e67980 /drivers/gpu/drm/radeon/r600_reg.h
parentd805f50aa1d9eef63fec356b2be557e2da3cd643 (diff)
downloadop-kernel-dev-808032ee296ee7b37a6df090be40a330e09ae30e.zip
op-kernel-dev-808032ee296ee7b37a6df090be40a330e09ae30e.tar.gz
drm/radeon/kms: clean HDMI definitions
We already know same offsets are used for different encoders/transmitters, so just numeric them instead naming incorrectly. Additionaly we found additional registers needed for RV770+ Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_reg.h')
-rw-r--r--drivers/gpu/drm/radeon/r600_reg.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/r600_reg.h b/drivers/gpu/drm/radeon/r600_reg.h
index d0e28ff..7b1d223 100644
--- a/drivers/gpu/drm/radeon/r600_reg.h
+++ b/drivers/gpu/drm/radeon/r600_reg.h
@@ -152,9 +152,9 @@
#define R600_AUDIO_STATUS_BITS 0x73d8
/* HDMI base register addresses */
-#define R600_HDMI_TMDS1 0x7400
-#define R600_HDMI_TMDS2 0x7700
-#define R600_HDMI_DIG 0x7800
+#define R600_HDMI_BLOCK1 0x7400
+#define R600_HDMI_BLOCK2 0x7700
+#define R600_HDMI_BLOCK3 0x7800
/* HDMI registers */
#define R600_HDMI_ENABLE 0x00
@@ -185,4 +185,8 @@
#define R600_HDMI_AUDIO_DEBUG_2 0xe8
#define R600_HDMI_AUDIO_DEBUG_3 0xec
+/* HDMI additional config base register addresses */
+#define R600_HDMI_CONFIG1 0x7600
+#define R600_HDMI_CONFIG2 0x7a00
+
#endif
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