diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-08-05 12:37:32 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-08-30 16:29:57 -0400 |
commit | 4f8629675800505c274bf7d17baefed197a76cd9 (patch) | |
tree | 1013dd190ec5d0b9b1357b038916e2f0e5551867 /drivers/gpu/drm/radeon/r600_blit.c | |
parent | 8dddb993bc87b06590f64da5578663386498aafa (diff) | |
download | op-kernel-dev-4f8629675800505c274bf7d17baefed197a76cd9.zip op-kernel-dev-4f8629675800505c274bf7d17baefed197a76cd9.tar.gz |
drm/radeon/kms: remove r6xx+ blit copy routines
No longer used now that we use the async dma engines or
CP DMA for bo copies.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_blit.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r600_blit.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c index f651881..daf7572 100644 --- a/drivers/gpu/drm/radeon/r600_blit.c +++ b/drivers/gpu/drm/radeon/r600_blit.c @@ -31,6 +31,37 @@ #include "r600_blit_shaders.h" +/* 23 bits of float fractional data */ +#define I2F_FRAC_BITS 23 +#define I2F_MASK ((1 << I2F_FRAC_BITS) - 1) + +/* + * Converts unsigned integer into 32-bit IEEE floating point representation. + * Will be exact from 0 to 2^24. Above that, we round towards zero + * as the fractional bits will not fit in a float. (It would be better to + * round towards even as the fpu does, but that is slower.) + */ +static __pure uint32_t int2float(uint32_t x) +{ + uint32_t msb, exponent, fraction; + + /* Zero is special */ + if (!x) return 0; + + /* Get location of the most significant bit */ + msb = __fls(x); + + /* + * Use a rotate instead of a shift because that works both leftwards + * and rightwards due to the mod(32) behaviour. This means we don't + * need to check to see if we are above 2^24 or not. + */ + fraction = ror32(x, (msb - I2F_FRAC_BITS) & 0x1f) & I2F_MASK; + exponent = (127 + msb) << I2F_FRAC_BITS; + + return fraction + exponent; +} + #define DI_PT_RECTLIST 0x11 #define DI_INDEX_SIZE_16_BIT 0x0 #define DI_SRC_SEL_AUTO_INDEX 0x2 |