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| author | Michel Dänzer <michel.daenzer@amd.com> | 2014-09-19 12:07:11 +0900 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-09-22 17:24:25 -0400 |
| commit | 11bab0ae9991b165b542294806013d1e06fb3294 (patch) | |
| tree | e1eb8ea4bb9d378eb7e17c41a563d6b76931c3e7 /drivers/gpu/drm/radeon/r600.c | |
| parent | fe3d9c4b87bb98222a502cc585844a0b950786fb (diff) | |
| download | op-kernel-dev-11bab0ae9991b165b542294806013d1e06fb3294.zip op-kernel-dev-11bab0ae9991b165b542294806013d1e06fb3294.tar.gz | |
drm/radeon: Clear RB_OVERFLOW bit earlier
Otherwise the bit remains set in rdev->ih.rptr, so the wptr can never
match that and we still have an infinite loop.
This fix allows me to successfully recover from an IH ring buffer
overflow.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 3cfb500..5514f1b 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -3792,6 +3792,7 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev) wptr = RREG32(IH_RB_WPTR); if (wptr & RB_OVERFLOW) { + wptr &= ~RB_OVERFLOW; /* When a ring buffer overflow happen start parsing interrupt * from the last not overwritten vector (wptr + 16). Hopefully * this should allow us to catchup. @@ -3802,7 +3803,6 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev) tmp = RREG32(IH_RB_CNTL); tmp |= IH_WPTR_OVERFLOW_CLEAR; WREG32(IH_RB_CNTL, tmp); - wptr &= ~RB_OVERFLOW; } return (wptr & rdev->ih.ptr_mask); } |
