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author | Alex Deucher <alexander.deucher@amd.com> | 2013-06-25 17:56:16 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-27 19:40:05 -0400 |
commit | a9e61410921bcc1aa8f594ffa6301d5baba90f3b (patch) | |
tree | 82c267bd9854a8d0cb7b3a8ccc8693194ecfd236 /drivers/gpu/drm/radeon/ni_dpm.c | |
parent | a0ceada6b4da18e8539bc3229adae3dc9b05d9a2 (diff) | |
download | op-kernel-dev-a9e61410921bcc1aa8f594ffa6301d5baba90f3b.zip op-kernel-dev-a9e61410921bcc1aa8f594ffa6301d5baba90f3b.tar.gz |
drm/radeon/kms: add dpm support for SI (v7)
This adds dpm support for SI asics. This includes:
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2/gen3 switching
- power containment
- shader power scaling
Set radeon.dpm=1 to enable.
v2: enable hainan support, rebase
v3: guard acpi stuff
v4: fix 64 bit math
v5: fix 64 bit div harder
v6: fix thermal interrupt check noticed by Jerome
v7: attempt fix state enable
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/ni_dpm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/ni_dpm.c | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index 8e6b23a..649d949 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c @@ -719,7 +719,7 @@ static const u32 cayman_sysls_enable[] = struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); -static struct ni_power_info *ni_get_pi(struct radeon_device *rdev) +struct ni_power_info *ni_get_pi(struct radeon_device *rdev) { struct ni_power_info *pi = rdev->pm.dpm.priv; @@ -1471,8 +1471,8 @@ static int ni_populate_smc_tdp_limits(struct radeon_device *rdev, return 0; } -static int ni_copy_and_switch_arb_sets(struct radeon_device *rdev, - u32 arb_freq_src, u32 arb_freq_dest) +int ni_copy_and_switch_arb_sets(struct radeon_device *rdev, + u32 arb_freq_src, u32 arb_freq_dest) { u32 mc_arb_dram_timing; u32 mc_arb_dram_timing2; @@ -3488,8 +3488,8 @@ void ni_dpm_setup_asic(struct radeon_device *rdev) rv770_enable_acpi_pm(rdev); } -static void ni_update_current_ps(struct radeon_device *rdev, - struct radeon_ps *rps) +void ni_update_current_ps(struct radeon_device *rdev, + struct radeon_ps *rps) { struct ni_ps *new_ps = ni_get_ps(rps); struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); @@ -3500,8 +3500,8 @@ static void ni_update_current_ps(struct radeon_device *rdev, eg_pi->current_rps.ps_priv = &ni_pi->current_ps; } -static void ni_update_requested_ps(struct radeon_device *rdev, - struct radeon_ps *rps) +void ni_update_requested_ps(struct radeon_device *rdev, + struct radeon_ps *rps) { struct ni_ps *new_ps = ni_get_ps(rps); struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); @@ -4192,8 +4192,12 @@ void ni_dpm_print_power_state(struct radeon_device *rdev, printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); for (i = 0; i < ps->performance_level_count; i++) { pl = &ps->performance_levels[i]; - printk("\t\tpower level 0 sclk: %u mclk: %u vddc: %u vddci: %u\n", - pl->sclk, pl->mclk, pl->vddc, pl->vddci); + if (rdev->family >= CHIP_TAHITI) + printk("\t\tpower level 0 sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n", + pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); + else + printk("\t\tpower level 0 sclk: %u mclk: %u vddc: %u vddci: %u\n", + pl->sclk, pl->mclk, pl->vddc, pl->vddci); } r600_dpm_print_ps_status(rdev, rps); } |