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| author | Jerome Glisse <jglisse@redhat.com> | 2013-01-02 17:30:35 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-01-03 13:18:41 -0500 |
| commit | 64c56e8ce377842c8c8ff41054530480c7128c0b (patch) | |
| tree | e72cf12a47e467ff5bf664d57698ba510e227c81 /drivers/gpu/drm/radeon/evergreend.h | |
| parent | eaaa6983ab2ccdf826c90838eb584211e0cadb76 (diff) | |
| download | op-kernel-dev-64c56e8ce377842c8c8ff41054530480c7128c0b.zip op-kernel-dev-64c56e8ce377842c8c8ff41054530480c7128c0b.tar.gz | |
drm/radeon: reset dma engine on gpu reset (v2)
This try to reset the dma engine when performing gpu reset. Hopefully
bringing back the gpu dma engine in sane state.
v2: agd5f: fix dma reset on cayman/TN, add support for SI
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreend.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreend.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index f82f98a1..5786a32 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h @@ -742,8 +742,9 @@ #define SOFT_RESET_ROM (1 << 14) #define SOFT_RESET_SEM (1 << 15) #define SOFT_RESET_VMC (1 << 17) +#define SOFT_RESET_DMA (1 << 20) #define SOFT_RESET_TST (1 << 21) -#define SOFT_RESET_REGBB (1 << 22) +#define SOFT_RESET_REGBB (1 << 22) #define SOFT_RESET_ORB (1 << 23) /* display watermarks */ @@ -2028,6 +2029,13 @@ #define CAYMAN_PACKET3_DEALLOC_STATE 0x14 /* DMA regs common on r6xx/r7xx/evergreen/ni */ +#define DMA_RB_CNTL 0xd000 +# define DMA_RB_ENABLE (1 << 0) +# define DMA_RB_SIZE(x) ((x) << 1) /* log2 */ +# define DMA_RB_SWAP_ENABLE (1 << 9) /* 8IN32 */ +# define DMA_RPTR_WRITEBACK_ENABLE (1 << 12) +# define DMA_RPTR_WRITEBACK_SWAP_ENABLE (1 << 13) /* 8IN32 */ +# define DMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ #define DMA_STATUS_REG 0xd034 #endif |
