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authorAlex Deucher <alexander.deucher@amd.com>2012-05-31 18:54:43 -0400
committerDave Airlie <airlied@redhat.com>2012-06-01 15:36:54 +0100
commit0b8c30bc4943137a4a36b9cb059b1cc684f5d702 (patch)
tree295dcf677dc9a45f83c305cd1c174b1654738c9d /drivers/gpu/drm/radeon/evergreend.h
parent29d654067a98c1cb8874c774e5fd799a038af8a6 (diff)
downloadop-kernel-dev-0b8c30bc4943137a4a36b9cb059b1cc684f5d702.zip
op-kernel-dev-0b8c30bc4943137a4a36b9cb059b1cc684f5d702.tar.gz
drm/radeon: properly program gart on rv740, juniper, cypress, barts, hemlock
Need to program an additional VM register. This doesn't not currently cause any problems, but allows us to program the proper backend map in a subsequent patch which should improve performance on these asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreend.h')
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index 79130bf..3dd43e7 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -452,6 +452,7 @@
#define MC_VM_MD_L1_TLB0_CNTL 0x2654
#define MC_VM_MD_L1_TLB1_CNTL 0x2658
#define MC_VM_MD_L1_TLB2_CNTL 0x265C
+#define MC_VM_MD_L1_TLB3_CNTL 0x2698
#define FUS_MC_VM_MD_L1_TLB0_CNTL 0x265C
#define FUS_MC_VM_MD_L1_TLB1_CNTL 0x2660
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