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author | J. Bruce Fields <bfields@redhat.com> | 2010-12-17 13:29:07 -0500 |
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committer | J. Bruce Fields <bfields@redhat.com> | 2010-12-17 13:29:07 -0500 |
commit | ec66ee3797e5848356cf593c6ec7aabf30a00cf1 (patch) | |
tree | 7ed5c84cc914644ffa1cd1b6a2b45db53fc224e8 /drivers/gpu/drm/radeon/evergreen.c | |
parent | 1205065764f2eda3216ebe213143f69891ee3460 (diff) | |
parent | b0c3844d8af6b9f3f18f31e1b0502fbefa2166be (diff) | |
download | op-kernel-dev-ec66ee3797e5848356cf593c6ec7aabf30a00cf1.zip op-kernel-dev-ec66ee3797e5848356cf593c6ec7aabf30a00cf1.tar.gz |
Merge commit 'v2.6.37-rc6' into for-2.6.38
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 488c36c..4dc5b47 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1650,7 +1650,36 @@ static void evergreen_gpu_init(struct radeon_device *rdev) } } - rdev->config.evergreen.tile_config = gb_addr_config; + /* setup tiling info dword. gb_addr_config is not adequate since it does + * not have bank info, so create a custom tiling dword. + * bits 3:0 num_pipes + * bits 7:4 num_banks + * bits 11:8 group_size + * bits 15:12 row_size + */ + rdev->config.evergreen.tile_config = 0; + switch (rdev->config.evergreen.max_tile_pipes) { + case 1: + default: + rdev->config.evergreen.tile_config |= (0 << 0); + break; + case 2: + rdev->config.evergreen.tile_config |= (1 << 0); + break; + case 4: + rdev->config.evergreen.tile_config |= (2 << 0); + break; + case 8: + rdev->config.evergreen.tile_config |= (3 << 0); + break; + } + rdev->config.evergreen.tile_config |= + ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; + rdev->config.evergreen.tile_config |= + ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8; + rdev->config.evergreen.tile_config |= + ((gb_addr_config & 0x30000000) >> 28) << 12; + WREG32(GB_BACKEND_MAP, gb_backend_map); WREG32(GB_ADDR_CONFIG, gb_addr_config); WREG32(DMIF_ADDR_CONFIG, gb_addr_config); |