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| author | Alex Deucher <alexander.deucher@amd.com> | 2014-01-27 11:54:44 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-01-29 15:23:05 -0500 |
| commit | e9a321c6b2ac954a7dbf235f419c255a424a1273 (patch) | |
| tree | 00f898ea95a749b64b284c375566055f7ee7cc65 /drivers/gpu/drm/radeon/evergreen.c | |
| parent | 50efa51afddb50a6ab47ee15614fcf180130888c (diff) | |
| download | op-kernel-dev-e9a321c6b2ac954a7dbf235f419c255a424a1273.zip op-kernel-dev-e9a321c6b2ac954a7dbf235f419c255a424a1273.tar.gz | |
drm/radeon: fix DAC interrupt handling on DCE5+
DCE5 and newer hardware only has 1 DAC. Use the correct
offset. This may fix display problems on certain board
configurations.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 4116d02..f2b9e21 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -4348,8 +4348,8 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev) WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); } - /* only one DAC on DCE6 */ - if (!ASIC_IS_DCE6(rdev)) + /* only one DAC on DCE5 */ + if (!ASIC_IS_DCE5(rdev)) WREG32(DACA_AUTODETECT_INT_CONTROL, 0); WREG32(DACB_AUTODETECT_INT_CONTROL, 0); |
