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| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2014-11-10 12:23:01 +0200 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2015-03-24 13:50:56 +0200 |
| commit | e7e24df4715906ad25041b0a4ca613186d4cf849 (patch) | |
| tree | 493a5c35ea01aa408ee6ba47b428c337c33c15dd /drivers/gpu/drm/omapdrm | |
| parent | 2dd3887b503c1cc8a61ef4a4f24462ce03f3ada5 (diff) | |
| download | op-kernel-dev-e7e24df4715906ad25041b0a4ca613186d4cf849.zip op-kernel-dev-e7e24df4715906ad25041b0a4ca613186d4cf849.tar.gz | |
drm/omap: tiler: fix race condition with engine->async
The tiler irq handler uses engine->async value, but the code that sets
engine->async and enables the interrupt does not have a barrier. This
may cause the irq handler to see the old value of engine->async, causing
memory corruption.
Reported-by: Harinarayan Bhatta <harinarayan@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm')
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c index f06243b..a1a824d 100644 --- a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c +++ b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c @@ -273,6 +273,8 @@ static int dmm_txn_commit(struct dmm_txn *txn, bool wait) /* mark whether it is async to denote list management in IRQ handler */ engine->async = wait ? false : true; + /* verify that the irq handler sees the 'async' value */ + smp_mb(); /* kick reload */ writel(engine->refill_pa, |
