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authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>2015-01-17 19:09:26 +0200
committerLaurent Pinchart <laurent.pinchart@ideasonboard.com>2015-06-12 22:52:45 +0300
commita42133a780b368f9ed18045a4453f92292db4b18 (patch)
treed9590153dff2ee70aa6ffe9377e1e9620fa86bb9 /drivers/gpu/drm/omapdrm/omap_drv.h
parente2cd09b202c5d32804f72bc28a9ed5a7d8a34452 (diff)
downloadop-kernel-dev-a42133a780b368f9ed18045a4453f92292db4b18.zip
op-kernel-dev-a42133a780b368f9ed18045a4453f92292db4b18.tar.gz
drm: omapdrm: Apply settings synchronously
The omapdrm driver implements a mechanism to apply new settings (due to plane update, plane disable, plane property set, CRTC mode set or CRTC DPMS) asynchronously. While this improves performance, it adds a level of complexity that makes transition to the atomic update API close to impossible. Furthermore the atomic update API requires part of the apply operations to be synchronous (such as pinning the framebuffers), so the current implementation needs to be changed. Simplify the CRTC and plane code by making updates synchronous to prepare for the switch to the atomic update API. Asynchronous update will be implemented in a second step. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm/omap_drv.h')
-rw-r--r--drivers/gpu/drm/omapdrm/omap_drv.h23
1 files changed, 3 insertions, 20 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h
index a42a11c..6c0cb46 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.h
+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
@@ -50,21 +50,6 @@ struct omap_drm_window {
uint32_t src_w, src_h;
};
-/* Once GO bit is set, we can't make further updates to shadowed registers
- * until the GO bit is cleared. So various parts in the kms code that need
- * to update shadowed registers queue up a pair of callbacks, pre_apply
- * which is called before setting GO bit, and post_apply that is called
- * after GO bit is cleared. The crtc manages the queuing, and everyone
- * else goes thru omap_crtc_apply() using these callbacks so that the
- * code which has to deal w/ GO bit state is centralized.
- */
-struct omap_drm_apply {
- struct list_head pending_node, queued_node;
- bool queued;
- void (*pre_apply)(struct omap_drm_apply *apply);
- void (*post_apply)(struct omap_drm_apply *apply);
-};
-
/* For transiently registering for different DSS irqs that various parts
* of the KMS code need during setup/configuration. We these are not
* necessarily the same as what drm_vblank_get/put() are requesting, and
@@ -153,13 +138,12 @@ void omap_fbdev_free(struct drm_device *dev);
const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc);
enum omap_channel omap_crtc_channel(struct drm_crtc *crtc);
-int omap_crtc_apply(struct drm_crtc *crtc,
- struct omap_drm_apply *apply);
+int omap_crtc_flush(struct drm_crtc *crtc);
+int omap_crtc_queue_unpin(struct drm_crtc *crtc, struct drm_framebuffer *fb);
void omap_crtc_pre_init(void);
void omap_crtc_pre_uninit(void);
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
struct drm_plane *plane, enum omap_channel channel, int id);
-void omap_crtc_flush(struct drm_crtc *crtc);
struct drm_plane *omap_plane_init(struct drm_device *dev,
int id, enum drm_plane_type type);
@@ -169,8 +153,7 @@ int omap_plane_mode_set(struct drm_plane *plane,
int crtc_x, int crtc_y,
unsigned int crtc_w, unsigned int crtc_h,
unsigned int src_x, unsigned int src_y,
- unsigned int src_w, unsigned int src_h,
- void (*fxn)(void *), void *arg);
+ unsigned int src_w, unsigned int src_h);
void omap_plane_install_properties(struct drm_plane *plane,
struct drm_mode_object *obj);
int omap_plane_set_property(struct drm_plane *plane,
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