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| author | Dan Carpenter <dan.carpenter@oracle.com> | 2013-11-12 13:34:11 +0100 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2013-11-14 14:57:03 +1000 |
| commit | 377cfdc6eeced55e220fea2d07d6ebdd32166e66 (patch) | |
| tree | 7072c9b8cac50b0ad052a982c531bf6ca781de51 /drivers/gpu/drm/nouveau | |
| parent | 35c336707f51f6336c9cb8a60b6f1aa5a3099ad7 (diff) | |
| download | op-kernel-dev-377cfdc6eeced55e220fea2d07d6ebdd32166e66.zip op-kernel-dev-377cfdc6eeced55e220fea2d07d6ebdd32166e66.tar.gz | |
drm/nvc0-/gr: shift wrapping bug in nvc0_grctx_generate_r406800
We care about the upper 32 bits here so we have to use 1ULL instead of 1
to avoid a shift wrapping bug.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c index 64dca26..fe67415 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c @@ -1039,7 +1039,7 @@ nvc0_grctx_generate_r406800(struct nvc0_graph_priv *priv) } while (!tpcnr[gpc]); tpc = priv->tpc_nr[gpc] - tpcnr[gpc]--; - tpc_set |= 1 << ((gpc * 8) + tpc); + tpc_set |= 1ULL << ((gpc * 8) + tpc); } nv_wr32(priv, 0x406800 + (i * 0x20), lower_32_bits(tpc_set)); |
