diff options
author | Alexandre Courbot <acourbot@nvidia.com> | 2017-01-26 16:56:45 +0900 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2017-03-07 17:05:13 +1000 |
commit | 48387f0ca5493258add078de7f5520756ddc510a (patch) | |
tree | 2480252dcbbe674d4fe7312017c27c7f7459acd5 /drivers/gpu/drm/nouveau/nvkm | |
parent | c3433603cab756bcad0d8629c291f43b4f591b7d (diff) | |
download | op-kernel-dev-48387f0ca5493258add078de7f5520756ddc510a.zip op-kernel-dev-48387f0ca5493258add078de7f5520756ddc510a.tar.gz |
drm/nouveau/secboot: support running ACR on SEC
Add support for running the ACR binary on the SEC falcon.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 18 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c | 8 |
2 files changed, 23 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c index 8339514..0b563bc 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c @@ -28,6 +28,7 @@ #include <subdev/mc.h> #include <subdev/pmu.h> #include <core/msgqueue.h> +#include <engine/sec2.h> /** * struct hsf_fw_header - HS firmware descriptor @@ -1017,7 +1018,7 @@ acr_r352_reset(struct nvkm_acr *_acr, struct nvkm_secboot *sb, enum nvkm_secboot_falcon falcon) { struct acr_r352 *acr = acr_r352(_acr); - struct nvkm_pmu *pmu = sb->subdev.device->pmu; + struct nvkm_msgqueue *queue; const char *fname = nvkm_secboot_falcon_name[falcon]; bool wpr_already_set = sb->wpr_set; int ret; @@ -1037,9 +1038,20 @@ acr_r352_reset(struct nvkm_acr *_acr, struct nvkm_secboot *sb, return ret; } - /* Otherwise just ask the PMU to reset the falcon */ + switch (_acr->boot_falcon) { + case NVKM_SECBOOT_FALCON_PMU: + queue = sb->subdev.device->pmu->queue; + break; + case NVKM_SECBOOT_FALCON_SEC2: + queue = sb->subdev.device->sec2->queue; + break; + default: + return -EINVAL; + } + + /* Otherwise just ask the LS firmware to reset the falcon */ nvkm_debug(&sb->subdev, "resetting %s falcon\n", fname); - ret = nvkm_msgqueue_acr_boot_falcon(pmu->queue, falcon); + ret = nvkm_msgqueue_acr_boot_falcon(queue, falcon); if (ret) { nvkm_error(&sb->subdev, "cannot boot %s falcon\n", fname); return ret; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c index 27c9dff..faf94a4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c @@ -87,6 +87,7 @@ #include <subdev/mc.h> #include <subdev/timer.h> #include <subdev/pmu.h> +#include <engine/sec2.h> const char * nvkm_secboot_falcon_name[] = { @@ -94,6 +95,7 @@ nvkm_secboot_falcon_name[] = { [NVKM_SECBOOT_FALCON_RESERVED] = "<reserved>", [NVKM_SECBOOT_FALCON_FECS] = "FECS", [NVKM_SECBOOT_FALCON_GPCCS] = "GPCCS", + [NVKM_SECBOOT_FALCON_SEC2] = "SEC2", [NVKM_SECBOOT_FALCON_END] = "<invalid>", }; /** @@ -133,11 +135,17 @@ nvkm_secboot_oneinit(struct nvkm_subdev *subdev) case NVKM_SECBOOT_FALCON_PMU: sb->boot_falcon = subdev->device->pmu->falcon; break; + case NVKM_SECBOOT_FALCON_SEC2: + /* we must keep SEC2 alive forever since ACR will run on it */ + nvkm_engine_ref(&subdev->device->sec2->engine); + sb->boot_falcon = subdev->device->sec2->falcon; + break; default: nvkm_error(subdev, "Unmanaged boot falcon %s!\n", nvkm_secboot_falcon_name[sb->acr->boot_falcon]); return -EINVAL; } + nvkm_debug(subdev, "using %s falcon for ACR\n", sb->boot_falcon->name); /* Call chip-specific init function */ if (sb->func->oneinit) |