drm/nouveau/clk: rename from clock (no binary change)

Rename to match the Linux subsystem responsible for the same kind of
things.  Will be investigating how feasible it will be to expose the
GPU clock trees with it at some point.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

5 files changed, 18 insertions, 18 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c
index 7648beb..50cbc38 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c
@@ -26,8 +26,8 @@
 #include <subdev/bios/bit.h>
 #include <subdev/bios/pll.h>
 #include <subdev/bios/init.h>
-#include <subdev/clock.h>
-#include <subdev/clock/pll.h>
+#include <subdev/clk.h>
+#include <subdev/clk/pll.h>
 #include <subdev/timer.h>
 
 #include <engine/fifo.h>
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c
index 64a983c..8d2970c 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c
@@ -27,7 +27,7 @@
 #include <subdev/bios/pll.h>
 #include <subdev/bios/perf.h>
 #include <subdev/bios/timing.h>
-#include <subdev/clock/pll.h>
+#include <subdev/clk/pll.h>
 #include <subdev/fb.h>
 
 #include <core/option.h>
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnva3.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnva3.c
index 3b38a53..50e8dee 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnva3.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnva3.c
@@ -30,8 +30,8 @@
 #include <subdev/bios/M0205.h>
 #include <subdev/bios/timing.h>
 
-#include <subdev/clock/nva3.h>
-#include <subdev/clock/pll.h>
+#include <subdev/clk/nva3.h>
+#include <subdev/clk/pll.h>
 
 #include <subdev/gpio.h>
 
@@ -168,7 +168,7 @@ nva3_link_train(struct nouveau_fb *pfb)
 {
 	struct nouveau_bios *bios = nouveau_bios(pfb);
 	struct nva3_ram *ram = (void *)pfb->ram;
-	struct nouveau_clock *clk = nouveau_clock(pfb);
+	struct nouveau_clk *clk = nouveau_clk(pfb);
 	struct nva3_ltrain *train = &ram->ltrain;
 	struct nouveau_device *device = nv_device(pfb);
 	struct nva3_ramfuc *fuc = &ram->fuc;
@@ -197,7 +197,7 @@ nva3_link_train(struct nouveau_fb *pfb)
 
 	clk_current = clk->read(clk, nv_clk_src_mem);
 
-	ret = nva3_clock_pre(clk, f);
+	ret = nva3_clk_pre(clk, f);
 	if (ret)
 		goto out;
 
@@ -252,7 +252,7 @@ nva3_link_train(struct nouveau_fb *pfb)
 	nv_mask(pfb, 0x616308, 0x10, 0x10);
 	nv_mask(pfb, 0x616b08, 0x10, 0x10);
 
-	nva3_clock_post(clk, f);
+	nva3_clk_post(clk, f);
 
 	ram_train_result(pfb, result, 64);
 	for (i = 0; i < 64; i++)
@@ -274,7 +274,7 @@ out:
 
 	train->state = NVA3_TRAIN_UNSUPPORTED;
 
-	nva3_clock_post(clk, f);
+	nva3_clk_post(clk, f);
 	return ret;
 }
 
@@ -465,7 +465,7 @@ nouveau_gddr3_dll_disable(struct nva3_ramfuc *fuc, u32 *mr)
 }
 
 static void
-nva3_ram_lock_pll(struct nva3_ramfuc *fuc, struct nva3_clock_info *mclk)
+nva3_ram_lock_pll(struct nva3_ramfuc *fuc, struct nva3_clk_info *mclk)
 {
 	ram_wr32(fuc, 0x004004, mclk->pll);
 	ram_mask(fuc, 0x004000, 0x00000001, 0x00000001);
@@ -504,7 +504,7 @@ nva3_ram_calc(struct nouveau_fb *pfb, u32 freq)
 	struct nva3_ram *ram = (void *)pfb->ram;
 	struct nva3_ramfuc *fuc = &ram->fuc;
 	struct nva3_ltrain *train = &ram->ltrain;
-	struct nva3_clock_info mclk;
+	struct nva3_clk_info mclk;
 	struct nouveau_ram_data *next;
 	u8  ver, hdr, cnt, len, strap;
 	u32 data;
@@ -555,7 +555,7 @@ nva3_ram_calc(struct nouveau_fb *pfb, u32 freq)
 		}
 	}
 
-	ret = nva3_pll_info(nouveau_clock(pfb), 0x12, 0x4000, freq, &mclk);
+	ret = nva3_pll_info(nouveau_clk(pfb), 0x12, 0x4000, freq, &mclk);
 	if (ret < 0) {
 		nv_error(pfb, "failed mclk calculation\n");
 		return ret;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnvc0.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnvc0.c
index 735cb95..d08eacd5 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnvc0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnvc0.c
@@ -28,8 +28,8 @@
 #include <subdev/bios/timing.h>
 #include <subdev/ltc.h>
 
-#include <subdev/clock.h>
-#include <subdev/clock/pll.h>
+#include <subdev/clk.h>
+#include <subdev/clk/pll.h>
 
 #include <core/option.h>
 
@@ -129,7 +129,7 @@ nvc0_ram_train(struct nvc0_ramfuc *fuc, u32 magic)
 static int
 nvc0_ram_calc(struct nouveau_fb *pfb, u32 freq)
 {
-	struct nouveau_clock *clk = nouveau_clock(pfb);
+	struct nouveau_clk *clk = nouveau_clk(pfb);
 	struct nouveau_bios *bios = nouveau_bios(pfb);
 	struct nvc0_ram *ram = (void *)pfb->ram;
 	struct nvc0_ramfuc *fuc = &ram->fuc;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnve0.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnve0.c
index 6bae474..60050aa 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnve0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnve0.c
@@ -32,8 +32,8 @@
 #include <subdev/bios/M0205.h>
 #include <subdev/bios/M0209.h>
 
-#include <subdev/clock.h>
-#include <subdev/clock/pll.h>
+#include <subdev/clk.h>
+#include <subdev/clk/pll.h>
 
 #include <subdev/timer.h>
 
@@ -1033,7 +1033,7 @@ nve0_ram_calc_xits(struct nouveau_fb *pfb, struct nouveau_ram_data *next)
 static int
 nve0_ram_calc(struct nouveau_fb *pfb, u32 freq)
 {
-	struct nouveau_clock *clk = nouveau_clock(pfb);
+	struct nouveau_clk *clk = nouveau_clk(pfb);
 	struct nve0_ram *ram = (void *)pfb->ram;
 	struct nouveau_ram_data *xits = &ram->base.xition;
 	struct nouveau_ram_data *copy;