drm/nouveau/volt: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

1 files changed, 46 insertions, 46 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 0489532..7f858ef 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -465,7 +465,7 @@ nv40_chipset = {
 	.mmu = nv04_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv40_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -490,7 +490,7 @@ nv41_chipset = {
 	.mmu = nv41_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -515,7 +515,7 @@ nv42_chipset = {
 	.mmu = nv41_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -540,7 +540,7 @@ nv43_chipset = {
 	.mmu = nv41_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -565,7 +565,7 @@ nv44_chipset = {
 	.mmu = nv44_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -590,7 +590,7 @@ nv45_chipset = {
 	.mmu = nv04_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -615,7 +615,7 @@ nv46_chipset = {
 	.mmu = nv44_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -640,7 +640,7 @@ nv47_chipset = {
 	.mmu = nv41_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -665,7 +665,7 @@ nv49_chipset = {
 	.mmu = nv41_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -690,7 +690,7 @@ nv4a_chipset = {
 	.mmu = nv44_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -715,7 +715,7 @@ nv4b_chipset = {
 	.mmu = nv41_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -740,7 +740,7 @@ nv4c_chipset = {
 	.mmu = nv44_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -765,7 +765,7 @@ nv4e_chipset = {
 	.mmu = nv44_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -793,7 +793,7 @@ nv50_chipset = {
 	.mxm = nv50_mxm_new,
 	.therm = nv50_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv50_disp_new,
 //	.dma = nv50_dma_new,
 //	.fifo = nv50_fifo_new,
@@ -818,7 +818,7 @@ nv63_chipset = {
 	.mmu = nv44_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -843,7 +843,7 @@ nv67_chipset = {
 	.mmu = nv44_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -868,7 +868,7 @@ nv68_chipset = {
 	.mmu = nv44_mmu_new,
 	.therm = nv40_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = nv04_disp_new,
 //	.dma = nv04_dma_new,
 //	.fifo = nv40_fifo_new,
@@ -896,7 +896,7 @@ nv84_chipset = {
 	.mxm = nv50_mxm_new,
 	.therm = g84_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.bsp = g84_bsp_new,
 //	.cipher = g84_cipher_new,
 //	.disp = g84_disp_new,
@@ -927,7 +927,7 @@ nv86_chipset = {
 	.mxm = nv50_mxm_new,
 	.therm = g84_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.bsp = g84_bsp_new,
 //	.cipher = g84_cipher_new,
 //	.disp = g84_disp_new,
@@ -958,7 +958,7 @@ nv92_chipset = {
 	.mxm = nv50_mxm_new,
 	.therm = g84_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.bsp = g84_bsp_new,
 //	.cipher = g84_cipher_new,
 //	.disp = g84_disp_new,
@@ -989,7 +989,7 @@ nv94_chipset = {
 	.mxm = nv50_mxm_new,
 	.therm = g84_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.bsp = g84_bsp_new,
 //	.cipher = g84_cipher_new,
 //	.disp = g94_disp_new,
@@ -1020,7 +1020,7 @@ nv96_chipset = {
 	.imem = nv50_instmem_new,
 	.mmu = nv50_mmu_new,
 	.bar = g84_bar_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.dma = nv50_dma_new,
 //	.fifo = g84_fifo_new,
 //	.sw = nv50_sw_new,
@@ -1051,7 +1051,7 @@ nv98_chipset = {
 	.imem = nv50_instmem_new,
 	.mmu = nv50_mmu_new,
 	.bar = g84_bar_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.dma = nv50_dma_new,
 //	.fifo = g84_fifo_new,
 //	.sw = nv50_sw_new,
@@ -1082,7 +1082,7 @@ nva0_chipset = {
 	.mxm = nv50_mxm_new,
 	.therm = g84_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.bsp = g84_bsp_new,
 //	.cipher = g84_cipher_new,
 //	.disp = gt200_disp_new,
@@ -1114,7 +1114,7 @@ nva3_chipset = {
 	.pmu = gt215_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gt215_ce_new,
 //	.disp = gt215_disp_new,
 //	.dma = nv50_dma_new,
@@ -1147,7 +1147,7 @@ nva5_chipset = {
 	.pmu = gt215_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gt215_ce_new,
 //	.disp = gt215_disp_new,
 //	.dma = nv50_dma_new,
@@ -1179,7 +1179,7 @@ nva8_chipset = {
 	.pmu = gt215_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gt215_ce_new,
 //	.disp = gt215_disp_new,
 //	.dma = nv50_dma_new,
@@ -1210,7 +1210,7 @@ nvaa_chipset = {
 	.mxm = nv50_mxm_new,
 	.therm = g84_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = g94_disp_new,
 //	.dma = nv50_dma_new,
 //	.fifo = g84_fifo_new,
@@ -1241,7 +1241,7 @@ nvac_chipset = {
 	.mxm = nv50_mxm_new,
 	.therm = g84_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.disp = g94_disp_new,
 //	.dma = nv50_dma_new,
 //	.fifo = g84_fifo_new,
@@ -1273,7 +1273,7 @@ nvaf_chipset = {
 	.pmu = gt215_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gt215_ce_new,
 //	.disp = gt215_disp_new,
 //	.dma = nv50_dma_new,
@@ -1307,7 +1307,7 @@ nvc0_chipset = {
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gf100_ce0_new,
 //	.ce[1] = gf100_ce1_new,
 //	.disp = gt215_disp_new,
@@ -1342,7 +1342,7 @@ nvc1_chipset = {
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gf100_ce0_new,
 //	.disp = gt215_disp_new,
 //	.dma = gf100_dma_new,
@@ -1376,7 +1376,7 @@ nvc3_chipset = {
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gf100_ce0_new,
 //	.disp = gt215_disp_new,
 //	.dma = gf100_dma_new,
@@ -1410,7 +1410,7 @@ nvc4_chipset = {
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gf100_ce0_new,
 //	.ce[1] = gf100_ce1_new,
 //	.disp = gt215_disp_new,
@@ -1445,7 +1445,7 @@ nvc8_chipset = {
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gf100_ce0_new,
 //	.ce[1] = gf100_ce1_new,
 //	.disp = gt215_disp_new,
@@ -1480,7 +1480,7 @@ nvce_chipset = {
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gf100_ce0_new,
 //	.ce[1] = gf100_ce1_new,
 //	.disp = gt215_disp_new,
@@ -1515,7 +1515,7 @@ nvcf_chipset = {
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gf100_ce0_new,
 //	.disp = gt215_disp_new,
 //	.dma = gf100_dma_new,
@@ -1581,7 +1581,7 @@ nvd9_chipset = {
 	.pmu = gf119_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gf100_ce0_new,
 //	.disp = gf119_disp_new,
 //	.dma = gf119_dma_new,
@@ -1615,7 +1615,7 @@ nve4_chipset = {
 	.pmu = gk104_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gk104_ce0_new,
 //	.ce[1] = gk104_ce1_new,
 //	.ce[2] = gk104_ce2_new,
@@ -1651,7 +1651,7 @@ nve6_chipset = {
 	.pmu = gk104_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gk104_ce0_new,
 //	.ce[1] = gk104_ce1_new,
 //	.ce[2] = gk104_ce2_new,
@@ -1687,7 +1687,7 @@ nve7_chipset = {
 	.pmu = gf119_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gk104_ce0_new,
 //	.ce[1] = gk104_ce1_new,
 //	.ce[2] = gk104_ce2_new,
@@ -1717,7 +1717,7 @@ nvea_chipset = {
 	.mmu = gf100_mmu_new,
 	.pmu = gk20a_pmu_new,
 	.timer = gk20a_timer_new,
-//	.volt = gk20a_volt_new,
+	.volt = gk20a_volt_new,
 //	.ce[2] = gk104_ce2_new,
 //	.dma = gf119_dma_new,
 //	.fifo = gk20a_fifo_new,
@@ -1747,7 +1747,7 @@ nvf0_chipset = {
 	.pmu = gk110_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gk104_ce0_new,
 //	.ce[1] = gk104_ce1_new,
 //	.ce[2] = gk104_ce2_new,
@@ -1783,7 +1783,7 @@ nvf1_chipset = {
 	.pmu = gk110_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gk104_ce0_new,
 //	.ce[1] = gk104_ce1_new,
 //	.ce[2] = gk104_ce2_new,
@@ -1819,7 +1819,7 @@ nv106_chipset = {
 	.pmu = gk208_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gk104_ce0_new,
 //	.ce[1] = gk104_ce1_new,
 //	.ce[2] = gk104_ce2_new,
@@ -1854,7 +1854,7 @@ nv108_chipset = {
 	.pmu = gk208_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
-//	.volt = nv40_volt_new,
+	.volt = nv40_volt_new,
 //	.ce[0] = gk104_ce0_new,
 //	.ce[1] = gk104_ce1_new,
 //	.ce[2] = gk104_ce2_new,