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authorTakashi Iwai <tiwai@suse.de>2010-02-17 14:24:46 +0100
committerTakashi Iwai <tiwai@suse.de>2010-02-17 14:24:46 +0100
commit7fb3a069bc5d3577409c2ae89f89cd264ff85816 (patch)
tree7fe3ba3b95faeecb01e4feafb9288ef4b523c6b3 /drivers/gpu/drm/nouveau/nv04_fifo.c
parent291186e049d7f8178ad31d43c38a53889f25d79e (diff)
parent9d3415a8cc76ff65c6602a121ac318432c5cd7ba (diff)
downloadop-kernel-dev-7fb3a069bc5d3577409c2ae89f89cd264ff85816.zip
op-kernel-dev-7fb3a069bc5d3577409c2ae89f89cd264ff85816.tar.gz
Merge branch 'fix/misc' into topic/misc
Conflicts: sound/pci/hda/patch_realtek.c
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_fifo.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fifo.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_fifo.c b/drivers/gpu/drm/nouveau/nv04_fifo.c
index 0c3cd53..f31347b 100644
--- a/drivers/gpu/drm/nouveau/nv04_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv04_fifo.c
@@ -71,6 +71,40 @@ nv04_fifo_reassign(struct drm_device *dev, bool enable)
return (reassign == 1);
}
+bool
+nv04_fifo_cache_flush(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
+ uint64_t start = ptimer->read(dev);
+
+ do {
+ if (nv_rd32(dev, NV03_PFIFO_CACHE1_GET) ==
+ nv_rd32(dev, NV03_PFIFO_CACHE1_PUT))
+ return true;
+
+ } while (ptimer->read(dev) - start < 100000000);
+
+ NV_ERROR(dev, "Timeout flushing the PFIFO cache.\n");
+
+ return false;
+}
+
+bool
+nv04_fifo_cache_pull(struct drm_device *dev, bool enable)
+{
+ uint32_t pull = nv_rd32(dev, NV04_PFIFO_CACHE1_PULL0);
+
+ if (enable) {
+ nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull | 1);
+ } else {
+ nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull & ~1);
+ nv_wr32(dev, NV04_PFIFO_CACHE1_HASH, 0);
+ }
+
+ return !!(pull & 1);
+}
+
int
nv04_fifo_channel_id(struct drm_device *dev)
{
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