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authorDave Airlie <airlied@redhat.com>2010-08-02 10:31:47 +1000
committerDave Airlie <airlied@redhat.com>2010-08-02 10:31:47 +1000
commitd6486813d2d0658c34f62212ba9a64be4d01c317 (patch)
tree2fac929ee406d4b5612db89a643430a3f94742ee /drivers/gpu/drm/nouveau/nouveau_fence.c
parent7827627107aeb629f1a056cb56b17bd4fb789e03 (diff)
parent05991110cf94117dd488f6d64dabdea56ff35107 (diff)
downloadop-kernel-dev-d6486813d2d0658c34f62212ba9a64be4d01c317.zip
op-kernel-dev-d6486813d2d0658c34f62212ba9a64be4d01c317.tar.gz
Merge remote branch 'nouveau/for-airlied' of ../drm-nouveau-next into drm-core-next
* 'nouveau/for-airlied' of ../drm-nouveau-next: (77 commits) drm/nouveau: set TASK_(UN)INTERRUPTIBLE before schedule_timeout() drm/nv50: fix some not-error error messages drm/nouveau: introduce gpio engine drm/nv50: correct wait condition for instmem flush drm/nouveau: Fix TV-out detection on unposted cards lacking a usable DCB table. drm/nouveau: Get rid of the remaining VGA CRTC locking. drm/nouveau: Move display init to a new nouveau_engine. drm/nouveau: Put back the old 2-messages I2C slave test. drm/nouveau: Reset AGP before running the init scripts. drm/nv30: Init the PFB+0x3xx memory timing regs. drm/nouveau: disable hotplug detect around DP link training drm/nv50: add function to control GPIO IRQ reporting drm/nouveau: add nv_mask register accessor drm/nouveau: fix build without CONFIG_ACPI drm/nouveau: Reset CRTC owner to 0 before BIOS init. drm/nouveau: No need to lock/unlock the VGA CRTC regs all the time. drm/nouveau: Remove useless CRTC_OWNER logging. drm/nouveau: Add some generic I2C gadget detection code. drm/i2c/ch7006: Don't assume that the specified config points to static memory. drm/nv04-nv3x: Implement init-compute-mem. ... Conflicts: drivers/gpu/drm/nouveau/nouveau_bios.c
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_fence.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fence.c35
1 files changed, 8 insertions, 27 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index faddf53..6b208ff 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -67,12 +67,13 @@ nouveau_fence_update(struct nouveau_channel *chan)
if (USE_REFCNT)
sequence = nvchan_rd32(chan, 0x48);
else
- sequence = chan->fence.last_sequence_irq;
+ sequence = atomic_read(&chan->fence.last_sequence_irq);
if (chan->fence.sequence_ack == sequence)
return;
chan->fence.sequence_ack = sequence;
+ spin_lock(&chan->fence.lock);
list_for_each_safe(entry, tmp, &chan->fence.pending) {
fence = list_entry(entry, struct nouveau_fence, entry);
@@ -84,6 +85,7 @@ nouveau_fence_update(struct nouveau_channel *chan)
if (sequence == chan->fence.sequence_ack)
break;
}
+ spin_unlock(&chan->fence.lock);
}
int
@@ -119,7 +121,6 @@ nouveau_fence_emit(struct nouveau_fence *fence)
{
struct drm_nouveau_private *dev_priv = fence->channel->dev->dev_private;
struct nouveau_channel *chan = fence->channel;
- unsigned long flags;
int ret;
ret = RING_SPACE(chan, 2);
@@ -127,9 +128,7 @@ nouveau_fence_emit(struct nouveau_fence *fence)
return ret;
if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
- spin_lock_irqsave(&chan->fence.lock, flags);
nouveau_fence_update(chan);
- spin_unlock_irqrestore(&chan->fence.lock, flags);
BUG_ON(chan->fence.sequence ==
chan->fence.sequence_ack - 1);
@@ -138,9 +137,9 @@ nouveau_fence_emit(struct nouveau_fence *fence)
fence->sequence = ++chan->fence.sequence;
kref_get(&fence->refcount);
- spin_lock_irqsave(&chan->fence.lock, flags);
+ spin_lock(&chan->fence.lock);
list_add_tail(&fence->entry, &chan->fence.pending);
- spin_unlock_irqrestore(&chan->fence.lock, flags);
+ spin_unlock(&chan->fence.lock);
BEGIN_RING(chan, NvSubSw, USE_REFCNT ? 0x0050 : 0x0150, 1);
OUT_RING(chan, fence->sequence);
@@ -173,14 +172,11 @@ nouveau_fence_signalled(void *sync_obj, void *sync_arg)
{
struct nouveau_fence *fence = nouveau_fence(sync_obj);
struct nouveau_channel *chan = fence->channel;
- unsigned long flags;
if (fence->signalled)
return true;
- spin_lock_irqsave(&chan->fence.lock, flags);
nouveau_fence_update(chan);
- spin_unlock_irqrestore(&chan->fence.lock, flags);
return fence->signalled;
}
@@ -190,8 +186,6 @@ nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
unsigned long timeout = jiffies + (3 * DRM_HZ);
int ret = 0;
- __set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
-
while (1) {
if (nouveau_fence_signalled(sync_obj, sync_arg))
break;
@@ -201,6 +195,8 @@ nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
break;
}
+ __set_current_state(intr ? TASK_INTERRUPTIBLE
+ : TASK_UNINTERRUPTIBLE);
if (lazy)
schedule_timeout(1);
@@ -221,27 +217,12 @@ nouveau_fence_flush(void *sync_obj, void *sync_arg)
return 0;
}
-void
-nouveau_fence_handler(struct drm_device *dev, int channel)
-{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
- struct nouveau_channel *chan = NULL;
-
- if (channel >= 0 && channel < dev_priv->engine.fifo.channels)
- chan = dev_priv->fifos[channel];
-
- if (chan) {
- spin_lock_irq(&chan->fence.lock);
- nouveau_fence_update(chan);
- spin_unlock_irq(&chan->fence.lock);
- }
-}
-
int
nouveau_fence_init(struct nouveau_channel *chan)
{
INIT_LIST_HEAD(&chan->fence.pending);
spin_lock_init(&chan->fence.lock);
+ atomic_set(&chan->fence.last_sequence_irq, 0);
return 0;
}
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