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| author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 09:57:36 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 12:17:43 +1000 |
| commit | 5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55 (patch) | |
| tree | f2aaba0aa92d945db18b68c93f53723ab4659807 /drivers/gpu/drm/nouveau/nouveau_chan.c | |
| parent | ebb58dc2ef8c62d1affa28160f57faa7b0e1dc02 (diff) | |
| download | op-kernel-dev-5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55.zip op-kernel-dev-5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55.tar.gz | |
drm/nouveau/mmu: rename from vmmgr (no binary change)
Switch to NVIDIA's name for the device.
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_chan.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_chan.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index aff9099..8030253 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -88,7 +88,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, u32 handle, u32 size, struct nouveau_channel **pchan) { struct nouveau_cli *cli = (void *)nvif_client(&device->base); - struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); + struct nouveau_mmu *mmu = nvkm_mmu(device); struct nv_dma_v0 args = {}; struct nouveau_channel *chan; u32 target; @@ -136,7 +136,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.target = NV_DMA_V0_TARGET_VM; args.access = NV_DMA_V0_ACCESS_VM; args.start = 0; - args.limit = cli->vm->vmm->limit - 1; + args.limit = cli->vm->mmu->limit - 1; } else if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) { if (device->info.family == NV_DEVICE_INFO_V0_TNT) { @@ -165,7 +165,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, args.target = NV_DMA_V0_TARGET_VM; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = 0; - args.limit = vmm->limit - 1; + args.limit = mmu->limit - 1; } } @@ -281,7 +281,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) { struct nvif_device *device = chan->device; struct nouveau_cli *cli = (void *)nvif_client(&device->base); - struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); + struct nouveau_mmu *mmu = nvkm_mmu(device); struct nouveau_software_chan *swch; struct nv_dma_v0 args = {}; int ret, i; @@ -294,7 +294,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) args.target = NV_DMA_V0_TARGET_VM; args.access = NV_DMA_V0_ACCESS_VM; args.start = 0; - args.limit = cli->vm->vmm->limit - 1; + args.limit = cli->vm->mmu->limit - 1; } else { args.target = NV_DMA_V0_TARGET_VRAM; args.access = NV_DMA_V0_ACCESS_RDWR; @@ -312,7 +312,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) args.target = NV_DMA_V0_TARGET_VM; args.access = NV_DMA_V0_ACCESS_VM; args.start = 0; - args.limit = cli->vm->vmm->limit - 1; + args.limit = cli->vm->mmu->limit - 1; } else if (chan->drm->agp.stat == ENABLED) { args.target = NV_DMA_V0_TARGET_AGP; @@ -324,7 +324,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) args.target = NV_DMA_V0_TARGET_VM; args.access = NV_DMA_V0_ACCESS_RDWR; args.start = 0; - args.limit = vmm->limit - 1; + args.limit = mmu->limit - 1; } ret = nvif_object_init(chan->object, NULL, gart, |
