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| author | Ben Skeggs <bskeggs@redhat.com> | 2012-07-22 11:55:54 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2012-10-03 13:12:55 +1000 |
| commit | f589be88caf32501a734e531180d5df5d6089ef3 (patch) | |
| tree | c6653b5d6aa47aade8abc79c0bb73462f82eef01 /drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c | |
| parent | bc9e7b9a61e9e92ddb58920cb2cb5c2e2825ca8a (diff) | |
| download | op-kernel-dev-f589be88caf32501a734e531180d5df5d6089ef3.zip op-kernel-dev-f589be88caf32501a734e531180d5df5d6089ef3.tar.gz | |
drm/nouveau/pageflip: kick flip handling out of engsw and into fence
This is all very much a policy thing, and hence will not belong in SW
after the rework.
engsw now only handles receiving the event to say "can flip now" and makes
a callback to perform the actual work.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c index 461fbf6..0b356f1 100644 --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c @@ -27,6 +27,7 @@ #include "nouveau_drv.h" #include <core/mm.h> #include <engine/fifo.h> +#include "nouveau_software.h" #define NVE0_FIFO_ENGINE_NUM 32 @@ -302,8 +303,11 @@ nve0_fifo_page_flip(struct drm_device *dev, u32 chid) spin_lock_irqsave(&dev_priv->channels.lock, flags); if (likely(chid >= 0 && chid < priv->base.channels)) { chan = dev_priv->channels.ptr[chid]; - if (likely(chan)) - ret = nouveau_finish_page_flip(chan, NULL); + if (likely(chan)) { + struct nouveau_software_chan *swch = + chan->engctx[NVOBJ_ENGINE_SW]; + ret = swch->flip(swch->flip_data); + } } spin_unlock_irqrestore(&dev_priv->channels.lock, flags); return ret; @@ -315,7 +319,7 @@ nve0_fifo_isr_subfifo_intr(struct drm_device *dev, int unit) u32 stat = nv_rd32(dev, 0x040108 + (unit * 0x2000)); u32 addr = nv_rd32(dev, 0x0400c0 + (unit * 0x2000)); u32 data = nv_rd32(dev, 0x0400c4 + (unit * 0x2000)); - u32 chid = nv_rd32(dev, 0x040120 + (unit * 0x2000)) & 0x7f; + u32 chid = nv_rd32(dev, 0x040120 + (unit * 0x2000)) & 0xfff; u32 subc = (addr & 0x00070000); u32 mthd = (addr & 0x00003ffc); u32 show = stat; |
