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| author | Ben Skeggs <bskeggs@redhat.com> | 2014-02-20 23:19:58 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2014-03-26 14:00:38 +1000 |
| commit | b62b9ec2eb7b2861db1186b701c04a08b6208553 (patch) | |
| tree | e53cdbd74118c999ae027beddef46071646cd6c9 /drivers/gpu/drm/nouveau/core/engine/disp | |
| parent | d67d92c0669ef1784edde11448f7881820b22df5 (diff) | |
| download | op-kernel-dev-b62b9ec2eb7b2861db1186b701c04a08b6208553.zip op-kernel-dev-b62b9ec2eb7b2861db1186b701c04a08b6208553.tar.gz | |
drm/nv50-/disp: allow dumping core channel state at first supervisor intr
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/core/engine/disp')
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c index 3b70868..e94866e 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c @@ -1520,12 +1520,14 @@ nv50_disp_intr_supervisor(struct work_struct *work) { struct nv50_disp_priv *priv = container_of(work, struct nv50_disp_priv, supervisor); + struct nv50_disp_impl *impl = (void *)nv_object(priv)->oclass; u32 super = nv_rd32(priv, 0x610030); int head; nv_debug(priv, "supervisor 0x%08x 0x%08x\n", priv->super, super); if (priv->super & 0x00000010) { + nv50_disp_mthd_chan(priv, NV_DBG_DEBUG, 0, impl->mthd.core); for (head = 0; head < priv->head.nr; head++) { if (!(super & (0x00000020 << head))) continue; diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c b/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c index 8d553dc..0eac17b 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c @@ -1174,6 +1174,7 @@ nvd0_disp_intr_supervisor(struct work_struct *work) { struct nv50_disp_priv *priv = container_of(work, struct nv50_disp_priv, supervisor); + struct nv50_disp_impl *impl = (void *)nv_object(priv)->oclass; u32 mask[4]; int head; @@ -1184,6 +1185,7 @@ nvd0_disp_intr_supervisor(struct work_struct *work) } if (priv->super & 0x00000001) { + nv50_disp_mthd_chan(priv, NV_DBG_DEBUG, 0, impl->mthd.core); for (head = 0; head < priv->head.nr; head++) { if (!(mask[head] & 0x00001000)) continue; |
